Legitimate peripheral participation on FPGA for fine grain microprocessor design education

Legitimate peripheral participation (LPP) is a new model that illustrates the learning process by practical participation, where it is at first legitimately peripheral but increases gradually in engagement and complexity. In a production line, the apprentices are engaged in stages under attenuated situation conditions and thus have an opportunity for observation to get approximate knowledge of the product in the early steps. The very first step is called way-in, which we have found very critical for the success of the whole learning process. Instruction-issue-logic was chosen as such in City-1 microprocessor design education environment , because it is the central part of superscalar microprocessors. Although our junior students had the opportunity for understanding the concept of superscalar through this way-in, FPGAs with 10,000 gates were found to be too small for a framework to move forward to full participation. In 2004, FPGAs with 200,000 gates were introduced that had a reorder buffer with 4 entries. As a results, 16 out of 52 junior students who took the course were successful in bringing their original devices into their microprocessors. This education could be used for training in industry-as well.