A Compact Fully Dynamic Capacitance-to-Digital Converter with Energy-Efficient Charge Reuse

An ultra-low-power fully dynamic capacitance-to-digital converter (CDC) that exploits a novel charge reuse technique is proposed. The CDC includes a capacitive bridge as the sensing frontend and an asynchronous successive approximation register ADC for signal digitization. Passive charge sharing between the frontend and ADC is used to enable a fully dynamic operation. Instead of resetting the capacitive bridge (with large sensing and reference capacitors) for each measurement, the charge is maintained and reused over many measurements to save energy. A power-gating technique is employed to reduce the stand-by power. As a result, a figure of merit as low as 4.3 fJ/conv-step is achieved for the CDC, which is $> 3\times $ better than the state of the art. Furthermore, it supports an inherent scaling of power versus speed with a minimum power of only 44 pW and a compact chip area of $6440~\mu \text{m}^{2}$ .