Safe-System-on-Chip for Functional Safety

Various research institutions and semiconductor manufacturers have presented approaches for miniaturized safety systems based on redundant configurations in the last years. ICAS has been working on approaches for Safety Systems on Chip (SoC) since 2005 and has developed several certified variants of safety SoCs in this context together with well-known safety manufacturers. In parallel, the further development of the architecture of safety SoCs was also driven forward and manifested with the ReSCU-V1 in 2018. A logical consequence is the development of the ReSCU-V2, with which further architectural developments of the safe SoC design at ICAS in Kassel have succeeded with a practically completely redundant architecture. The resulting SoC was realized on a 180 nm process from UMC. It has a chip size of $5\times 5\ \text{mm}$ and consumes less than 500 mW of power.