Towards a Software Approach to Mitigate Correlation Power Analysis
2016
In this research we present a novel implementation for a software countermeasure to mitigate Correlation
Power Analysis (CPA). This countermeasure combines pseudo controlled-random dummy code and a task
scheduler using multi threads to form dynamic power traces which obscures the occurrence of critical operations
of the AES-128 algorithm. This work investigates the use of a task scheduler to generate noise at specific
areas in the AES-128 algorithm to mitigate the CPA attack. The dynamic power traces have shown to be an
effective contermeasure, as it obscures the CPA into predicting the incorrect secret key. Furthermore, the countermeasure
is tested on an ATmega and an ATxmega microcontroller. The basic side channel analysis attack
resistance has been increased and in both scenarios the proposed countermeasure has reduced the correlation
accuracy and forced the CPA to predict the incorect key. The correlation accuracy decreased from 97.6% to
53.6% on the ATmega microntroller, and decreased from 82% to 51.4% on the ATxmega microcontroller.
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