A lean power management technique : The lowest power consumption for the given operating speed of LSIs.

lean power management technique which can realize the lowest power consumption of LSls at the given operating speed is described in this paper. Though having a 3V single power supply, an internal DSP core always operates at a minimum voltage satisfying the required operating speed by incorporating a newly developed power management unit (including a variable delay module, an internal lowest voltage detector, a DClDC converter, and a level shifter). Moreover, a low voltage, high speed operation, and a low standby current are realized by MT (Multi-Threshold) CMOS technology. As a result, the DSP core has been designed successfully to attain 20MHz operation at 1.2V internal voltage with a power consumption of 12mW which is I/ 5 of the conventional's.