Mixed crystal plane silicon-on-insulator (SOI) bipolar complementary metal oxide semiconductor (BiCMOS) integrated device based on square channel process and preparation method

The invention discloses a mixed crystal plane silicon-on-insulator (SOI) bipolar complementary metal oxide semiconductor (BiCMOS) integrated device based on a square channel process and a preparation method. The method comprises the following steps of: preparing an SOI substrate, continuously growing N-Si, P-SiGe and N-Si layers on the SOI substrate, preparing an deep groove isolator, forming a collector, a base and an emitter contact area, and forming a SiGe heterojunction bipolar transistor (HBT) device; photo-etching an active area of a p-channel metal oxide semiconductor (PMOS) device, continuously growing 7 layers of materials in the active area, preparing a drain and a grid, and forming the PMOS device; photo-etching a groove of an active area of an n-channel metal oxide semiconductor (NMOS) device, continuously growing 4 layers of materials in the active area, preparing a grid dielectric layer and grid polycrystalline, and forming the NMOS device; and photo-etching lead holes, alloying, photo-etching leads, and thus forming the mixed crystal plane SOI BiCMOS integrated device and a mixed crystal plane SOI BiCMOS integrated circuit of which CMOS conductive channels are 22 to 45 nanometers based on the square channel process. By fully using the characteristic of mobility anisotropy of a strain Si material, the mixed crystal plane SOI BiCMOS integrated circuit with enhanced performance is prepared at the temperature between 600 and 800 DEG C.