Processor having a suitable operating frequency

The invention relates to a digital data processing device capable of processing data which has been sampled with one sample clock relative to the basic clock of the device. For this, the device is provided with means for generating, from the basic clock, an operating clock that is a function of the data sampling clock to be treated. This operation clock has a constant integer number of active periods during one cycle of the clock echantillonnage.Application: digital communications systems; including demodulation.