A gate-level simulator for MS-DOS personal computers

Abstract the simulation at gate level of digital systems is a critical step in the design and timing verification of such systems. In this paper the main characteristics and performances of a gate level simulator are illustrated; the program has been developed on a MS-DOS personal computer with the convinction that this kind of tool can be very useful for educational and training purposes, taking into account the vast diffusion of powerful low cost PC's. The program needs 181 kB of central memory for code and data structures necessary for circuits constituted of up to 2000 gates, therefore the minimum memory necessary to carry out a simulation is 256 kB.