An MPEG-4 video LSI with an error-resilient codec core based on a fast motion estimation algorithm

An MPEG-4 video codec core based on a scene-adaptive motion estimation algorithm is integrated into 5.296/spl times/5.296 mm/sup 2/ die using 0.18 /spl mu/m quad-metal technology. The power dissipation during codec operation of the device is 131 mW for QCIF format at 15 frames/s at 13.5 MHz using a 1.5 V supply.