Pt/Cu:ZnO/Nb:STO memristive dual port for cache memory applications

Platinum (Pt)/Copper doped (5%) ZnO (Cu:ZnO)/Nb doped SrTiO3 (Nb:STO) memristors were fabricated and their equivalent models were incorporated into simulation environment through utilizing voltage threshold adaptive memristor (VTEAM) model. Pt and Nb:STO were used as top and bottom electrode, respectively whereas Cu:ZnO served the purpose of active layer. The model was developed in Verilog-A software, which was invoked into Cadence Virtuoso. Utilizing these memristors, dual port memory circuits for cache-based applications were implemented with isolated read and write data paths. A comparative performance study with the existing dual port technologies revealed improvements in terms of read/write latencies and power consumption. This proposed study paves way for low power and high-speed dual port networks for futuristic computing systems.