An ultra wideband TAG circuit transceiver architecture

The paper presents the architecture of a low power, low complexity ultra wideband (UWB) transceiver circuit. The circuit is designed for low data rate, low cost applications with built in location and tracking. The system is based on a non-coherent architecture which enables the receiver to be extremely simple and largely insensitive to the transmitted pulse shape. The circuit presented contains the oscillator generator, the transmitter, the receiver and baseband digital signal processing (DSP) block. The oscillator generator contains the quartz oscillator, a delay-locked loop (DLL) and edge combiner for clock multiplication to generate a 495 MHz timing signal for pulse generation. The transmitter contains a second DLL (to fix the UWB pulse delay), UWB pulse generator and antenna. The 495 MHz RF signal together with the transmitted UWB pulse are presented. The receiver contains low noise amplifier, variable gain amplifier, squaring circuits, integrators for energy collection, 4 bit A/D converters, digital control logic, integrator and gain selection logic block and detection/bit decision block. The circuits are designed in a 0.35 /spl mu/m Si-Ge BiCMOS process from Austria Microsystems. The UWB TAG is not yet manufactured.