MALU-an ALU with single period multiplication
1995
An ALU design which can perform Mbit/spl times/Nbit multiplication within single instruction period is presented in this paper. The architecture, operation control and logic for this ALU are given. Logical and spice (with 2 /spl mu/m CMOS technology) simulation results are also given. It can be used in MPUs and MCUs to enhance their computation capability.
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