CMOS circuit for high-speed flexible read-out of CMOS imagers

In this paper, a CMOS circuit for flexible read-out of imagers is proposed allowing random access, sequential access and window based access to the pixels. The circuit has been implemented within a CMOS imager using 0.7 micrometers technology. It is shown that this versatile read-out technique is obtained with only 8% increase in the silicon area as compared to the often used sequential read-out technique. The read-out circuit is fully digital, which makes it more robust against sizing mismatch. The circuit operates at a maximum frequency of 50 MHz which makes it very attractive for real time applications.