Employ Present Five Masks Amorphous Silicon Thin-Film Transistor Design and Process Flow to Realize 5-in. InGaZnO Active-Matrix Liquid Crystal Display with Improved Stress Stability
2011
The present five masks bottom gate and staggered amorphous silicon (a-Si) thin-film transistor (TFT) process flow is not suitable for indium–gallium–zinc-oxide (IGZO) TFT because of its vulnerability to post etching process during the source/drain pattern. Bottom gate and coplanar IGZO TFTs were made feasible through the reverse of second (channel layer) and third (source/drain electrodes) masks process flow to avoid etching damage problem. Besides, the post IGZO nitrous oxygen (N2O) plasma treatment was employed to improve the stress instability. On the basis of secondary ion mass spectrometry (SIMS) and X-ray spectroscopy (XPS) results, it is believed that the post N2O plasma treatment passivates the interface states and converts the inhomogeneous and low quality IGZO to the homogeneous and high quality IGZO. In the end, a 5-in. IGZO active-matrix liquid crystal display was demonstrated via five masks bottom gate and coplanar TFT configuration.
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