An Architectural-Enhanced Secure Design in Embedded System

In order to resist software attack (such as buffer overflow) and hardware attack of embedded system, this paper presents a series of novel architectural-enhanced security solutions, including tracing the crucial process of execution behavior, cryptographic algorithm and integrity schemes for memory authentication and secure tag validation. The design is implemented on an actual FPGA platform. The experimental result shows that this design can eliminate a wide range of software and hardware attacks with low performance loss and minimal resource overheads.