Vertical sidewall roughness measured by AFM and SEM

When defining 2D structures in Si, a very important parameter determining the structure’s performance is the sidewall roughness, see figures above. Sidewall roughness is a significant source of linewidth control problems for IC manufactures, a source of process control problems in nanoimprint lithography and contributes to, e.g., losses in photonic waveguides. It is yet not thoroughly examined in literature. In this paper we demonstrate the use of atomic force microscopy (AFM) and scanning electron microscopy (SEM) to examine lines defined by e-beam lithography and dry etched into silicon, corresponding to fabrication of a stamp for nanoimprint lithography. The dry etching process was performed using a “Bosch process” based on fluoride chemistry optimised to minimize the sidewall roughness.