Design of A Novel Low Voltage Triggered Silicon Controlled Rectifier (SCR) for ESD Applications

In this paper, a novel low-voltage triggered silicon-controlled rectifier (NLVTSCR) with low trigger voltage and higher holding voltage is proposed and implemented in a 28nm CMOS process. The proposed NLVTSCR in the TLP test has a low trigger voltage and an adjustable high holding voltage from 3.44Vto 4.93V. In addition, it does not require any additional masks, making it an excellent candidate for 3.3V ESD protection. Compared to conventional low triggered voltage silicon-controlled rectifier (LVTSCR), the proposed NLVTSCR device provides a higher holding voltage than its conventional counterpart.