Write/erase speed modeling of scaled SONOS and TANOS nonvolatile semiconductor memory (NVSM) devices

We have developed a pulse response model of write/erase operations for SONOS NVSMs. In this model, we consider the major charge transport mechanisms are band to band tunneling and trap-assisted tunneling. The storage charges in the nitride are treated as a sheet charge at the center of the nitride films. Using a numerical method, the pulse response of the threshold voltages is simulated in good agreement with experimental data.