Process integration of a 27nm, 16Gb Cu ReRAM

John K. Zahurak,Koji Miyata,Mark Fischer,Murali Balakrishnan,Sameer Chhajed,David H. Wells,Hong Li,Alessandro Torsi,Jay Lim,Mark S. Korber,Keiichi Nakazawa,Satoru Mayuzumi,Motonari Honda,Scott E. Sills,Shuichiro Yasuda,Alessandro Calderoni,Beth R. Cook,Gowri Damarla,Hai Tran,Bei Wang,Chris Cardon,Kamal M. Karda,Jun Okuno,Adam Johnson,Takafumi Kunihiro,Jun Sumino,Masanori Tsukamoto,Katsuhisa Aratani,Nirmal Ramaswamy,Wataru Otsuka,Kirk Prall

Process integration of a 27nm, 16Gb Cu ReRAM

2014

A 27nm 16Gb Cu based NV Re-RAM chip has been demonstrated. Novel process introduction to enable this technology include a Damascene Cell, Line-SAC Digit Lines filled with Cu, exhumed-silicided array contacts, raised epitaxial arrays, and high-drive buried access devices.

Keywords:

Nanotechnology
Resistive random-access memory
Electronic engineering
Process integration
Chip
Copper interconnect
Physics
Optoelectronics

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