Impact of Substrate Bias Polarity on Performance of Complementary Symmetric Lateral Bipolar on SiGe-OI Inverter

Results from recent studies in Symmetric Lateral Bipolar Transistor (SLBT) on SOI makes it as one of the most promising candidate for next generation nano electronic device in low power high speed mixed signal circuits. In this paper we carried out a systematic study and discuss the impact of substrate bias polarity on the performance of the SLBT on SiGe-OI in inverter circuit. DC analysis shows that there is slightly lower static current loss (or quiescent leakage), $\mathrm{I}_{\mathrm{D}\mathrm{D}\mathrm{Q}}$ for inverter with opposite substrate bias polarity. AC analysis shows that there is improvement in delay with application of substrate bias. We observe almost no difference in $\mathrm{I}_{\mathrm{D}\mathrm{D}\mathrm{Q}}$ but improvement in speed by $\sim 0.156\text{ps}$ with substrate bias w.r.t inverter with opposite substrate bias polarity.