Objectivity, Proximity and Adaptability in Corporate Governance

A semiconductor memory device is disclosed, in which a word line address translation unit, a data line address translation unit, a first spare memory and a second spare memory are provided in addition to a main memory to relieve a defective memory cell in the main memory. Spare word line address signals for selecting a spare word line on the first spare memory are written in the word line address translation unit, spare data line address signals for selecting a spare data line on the second spare memory are written in the data line address translation unit, and each of the word line address translation unit and the data line address translation unit is constructed of an ordinary semiconductor memory of the multi-bit output type.