Optimal power switch design for dynamic voltage scaling from high performance to subthreshold operation

2012 
This work explores optimizing power switch design for Dynamic Voltage Scaling schemes that use headers to connect components to voltage supplies ranging from strong inversion to subthreshold values. We propose using NMOS devices with their gate controlled at the nominal voltage as power switches connected to the subthreshold voltage rail. Measured results show that an NMOS can provide the subthreshold voltage with a power switch size >280X smaller than a PMOS. For architectures targeting operation from subthreshold up to nominal voltage, we show that using an asymmetric transmission gate power switch provides a lower overhead way to enable this flexibility.
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