Binary OxRAM/CBRAM Memories for Efficient Implementations of Embedded Neuromorphic Circuits

This chapter describes an artificial synapse composed of multiple binary resistive RAM (RRAM) cells connected in parallel, thereby providing synaptic analog behavior. The vertical RRAM technology is presented as a possible solution to gain area by realizing one pillar per synapse. First, the proposed synapse has been used for the implementation of power efficient Convolutional Neural Networks for visual pattern recognition with supervised learning. This architecture is suitable for embedded hardware implementation in portable devices, thereby eliminating the latency to cloud access and avoiding the large energy cost per bit transmitted through the cloud. Second, the RRAM-based synapse coupled with unsupervised learning has been proposed to perform real-time decoding (spike sorting) of complex brain signals using a RRAM-based fully connected neural network. This approach coupled with brain-machine interfaces (BMIs) may enable the design of prosthetic devices that require to extract and decode in situ information from very large numbers of neurons without transmitting and processing this information offline.