Transverse power MOS high-voltage device

The invention discloses a transverse power MOS high-voltage device. The transverse power MOS high-voltage device comprises a P-type substrate, an N-type active layer arranged on the P-type substrate, a field silicon oxide layer arranged on the N-type active layer, a source electrode region and a drain electrode region, wherein the source electrode region and the drain electrode region are located on the two sides of the top end of the MOS device. The transverse power MOS high-voltage device is characterized in that the P-type substrate comprises a first P-type silicon layer, a second P-type silicon layer......a nth P-type silicon layer, a plurality of discontinuous N+ regions are arranged between the nth P-type silicon layer and the (n-1)th P-type silicone layer, and NP junctions are formed between the N+ regions and the P-type silicon layers, wherein n is larger than or equal to two. The transverse power MOS high-voltage device aims to optimizing the transverse electric field of a shift region so as to improve the withstand voltage of the device, substrate potential pinning is achieved by injecting the discontinuous N+ regions to a plurality of P-type substrate interface layers, a new electric field peak value is introduced into the substrate, the electric field of a main junction below the drain end is reduced so as to achieve the purpose of assisting use-up of the substrate, so that the longitudinal electric field value of an NP junction formed by the shift region and the substrate is reduced, and therefore the purpose of optimizing the transverse electric field of the device on the condition that the device is not broken down is guaranteed.