Auxiliary IP blocks for early dependability analysis of small processor based systems

2016 
Fault injection experiments are a powerful aid to identify and fix problems in the design of fault tolerance mechanisms, particularly when performed at early development phases. For this purpose, it is important not only to classify the faults, but also to understand the different faulty behaviors. When an embedded system is considered, a common approach for analyzing the faulty behavior is to exploit the execution trace features often available in medium to high size processors. This paper proposes two IP modules intended to facilitate fault injection experiments in small processor systems: a memory saboteur and a bus event recorder. The former allows the injection of SEU and stuck-at faults, both at a specific memory location and at the address or data bus level. The latter provides an alternative to the use of a full execution trace solution, which is often not available in small processors. The IP blocks were used to inject the faults and to analyze the behavior of a submodule of an implantable pulse generator running on an FPGA-hosted openMSP430 processor system. The IP blocks, the fault injection environment and the results of the fault injection campaigns are presented. The event traces captured by the event recorder IP played a fundamental role to understand the faulty behavior.
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