A 16K E/SUP 2/PROM using E/SUP 2/ element redundancy

A new LSI memory redundancy technique using E/SUP 2/PROM cells as the programmable element has been developed. Yield enhancement with this technique has been demonstrated using two redundant rows on a 16K E/SUP 2/PROM chip. This paper describes the structure and operation of the circuit blocks used, and how these circuits interface with the memory chip to produce the observed yield enhancement. The method for programming the redundancy elements is described, along with circuit advantages and capabilities unique to E/SUP 2/PROM redundancy. Device performance and yield enhancement for the 16K E/SUP 2/PROM are summarized.