Phase comparator, Plls circuit, the information reproducing apparatus, an optical disk reproducing apparatus and a magnetic disk reproducing device

In the phase comparator used in the synchronous clock extraction circuit for extracting a clock synchronized with the reproduced data, the zero-crossing detection unit 701, from the reproduction data, a rising cross detection signal, and the fall cross detection signal, three samples consecutive data outputs three phase error candidate is. Reference value holding unit 703, 704 rise and fall outputs a reference value rising reference value and falling. Phase error calculating unit 702, when the received a rising or falling cross detection signal, of the three sample data including zero cross sample data, the rising or falling reference value of the absolute difference phase to the minimum sample data and outputs it as an error. This phase error is held in the reference value retaining unit 703 and 704 falling the rising or falling as a reference value rising or falling at the time of the next phase error calculation. Therefore, a wide capture range is realized.