Embedded instrumentation

In the electronics industry, embedded instrumentation refers to the integration of test and measurement instrumentation into semiconductor chips (or integrated circuit devices). Embedded instrumentation differs from embedded system, which are electronic systems or subsystems that usually comprise the control portion of a larger electronic system. Instrumentation embedded into chips (embedded instrumentation) is employed in a variety of electronic test applications, including validating and testing chips themselves, validating, testing and debugging the circuit boards where these chips are deployed, and troubleshooting systems once they have been installed in the field. In the electronics industry, embedded instrumentation refers to the integration of test and measurement instrumentation into semiconductor chips (or integrated circuit devices). Embedded instrumentation differs from embedded system, which are electronic systems or subsystems that usually comprise the control portion of a larger electronic system. Instrumentation embedded into chips (embedded instrumentation) is employed in a variety of electronic test applications, including validating and testing chips themselves, validating, testing and debugging the circuit boards where these chips are deployed, and troubleshooting systems once they have been installed in the field. A working group of the IEEE (Institute of Electrical and Electronic Engineers) that is developing a standard for accessing embedded instruments (the IEEE 1687 Internal JTAG standard) defines embedded instrumentation as follows: Any logic structure within a device whose purpose is Design for Test (DFT), Design-for-Debug (DFD), Design-for-Yield (DFY), Test… There exists the widespread use of embedded instrumentation (such as BIST (built-in self-test) Engines, Complex I/O Characterization and Calibration, Embedded Timing Instrumentation, etc.). Dating back to as early as the 1990s, the electronics industry recognized that design validation, test and debug would be seriously impeded in the near future. Initially, the impetus behind this recognition and the subsequent development of solutions was the emergence of new semiconductor chip packages such as the ball grid array (BGA) which placed the device’s pins beneath the silicon die, making them inaccessible to physical contact with an instrument’s or a test system’s metal probes. At that time, most test instruments, such as the oscilloscope and logic analyzers in design, and in-circuit test (ICT) in volume manufacturing were external to the chips and circuit boards. They relied upon placing a probe on a chip or a circuit board to obtain test data. To overcome the disappearing access for test probes, instrumentation technology began to be embedded into semiconductors and onto printed circuit boards. In recent years, this situation has been exacerbated by increasingly high-speed serial inter-chip connections (interconnects or buses) on circuit boards as well as by even more complex chip packaging technologies like system-on-a-chip (SOC), system-in-package (SIP) and package-on-package (POP). These and other developments are making instrumentation embedded into chips a necessity for design validation, test and debug processes. Although it was not referred to as an embedded instrument at the time of its development, the IEEE 1149.1 Boundary Scan Standard can be seen as the first enabling technology for embedded instrumentation. (Boundary scan is also referred to as JTAG, after the Joint Test Action Group which initially undertook its development before it came under the aegis of a working group of the IEEE. ‘JTAG’ is often used to designate the access port on a chip which conforms to the boundary-scan standard.) Some would consider the boundary-scan test process as a form of embedded instrumentation. Boundary scan involves embedding an instrumentation infrastructure into chips and onto circuit boards. This infrastructure can be utilized during design debug and first prototype board bring-up, volume manufacturing and field service to test and diagnose the structural integrity of electrical connections on circuit boards. In addition, the boundary scan infrastructure can also be applied to the programming of devices such as memories, complex programmable logic devices (CPLDs) and Field-programmable gate arrays (FPGAs) after they have been soldered to a circuit board. In the intervening years since the development of boundary-scan standard as a structural test technology, the embedded boundary-scan infrastructure in chips and on circuit boards has been appropriated for a number of related applications, including as an access method to the instrumentation inserted in chips. A later standard in the boundary-scan family, the IEEE 1149.6 Boundary-Scan Standard for Advanced Digital Networks, utilizes the 1149.1 boundary-scan embedded instrumentation infrastructure but expands the types of chip-to-chip interconnects that can be tested. Whereas the 1149.1 standard defines a methodology for testing DC-coupled interconnects, the 1149.6 version of the boundary-scan standard extends the methodology to testing high-speed AC coupled and/or differential interconnects.