Laser-assisted device alteration (LADA) is a laser-based timing analysis technique used in the failure analysis of semiconductor devices. The laser is used to temporarily alter the operating characteristics of transistors on the device. Laser-assisted device alteration (LADA) is a laser-based timing analysis technique used in the failure analysis of semiconductor devices. The laser is used to temporarily alter the operating characteristics of transistors on the device. The LADA technique targets a variable power continuous wave (CW) laser at specific device transistors. The laser is typically of a short wavelength variety on the order of 1064 nm. This allows the laser to generate photo carriers in the silicon without resulting in localized heating of the device. The LADA technique is somewhat similar in execution to the Soft Defect Localization (SDL) technique, except that SDL uses a longer wavelength laser (1340 nm) in order to induce localized heating rather than generate photo carriers. Both techniques require the device to be scanned with a laser while it is under active stimulation by the tester. The device being tested is electrically stimulated and the device output is monitored. This technique is applied to the back side of the semiconductor device, thereby allowing direct access of the laser to the device active diffusion regions. The effect of the laser on the active transistor region is to generate a localized photocurrent. This photocurrent is a temporary effect and only occurs during the time that the laser is stimulating the target region. The creation of this photocurrent alters the transistor operating parameters, which may be observed as a change in function of the device. The effect of this change in parameters may be to speed up or slow down the operation of the device. This makes LADA a suitable technique for determining critical timing paths within a semiconductor circuit. The laser has differing effects on NMOS and PMOS transistors. In the case of NMOS, the transistor will turn on. For PMOS, however, the effect is to lower the transistor threshold voltage. The effect on the PMOS transistor becomes proportionately stronger as the laser power is increased. The effect is to either increase or decrease the speed of the device being tested. Setup for a LADA analysis involves connecting the device to a test stimulus. The test parameters for operating voltage and device speed are then adjusted to place the device into a state which borders on a pass–fail or fail–pass transition. It is useful to use a tester Shmoo plot to select the appropriate operating conditions. The effect of scanning the laser over sensitive regions is to trip the device from a pass into a fail condition, or from a fail into a pass condition. LADA is useful for confirming or disproving an existing theory for the cause of failure. It may be used to confirm suspected transistor leakage or bus noise. It has also found wide use in localizing process defects as the LADA effect easily modulates transistor characteristics in the same path as the process defect. LADA has been used to analyze failures in domino logic, state elements in memories and leakage.