Moore's law

Moore's law is the observation that the number of transistors in a dense integrated circuit doubles about every two years. The observation is named after Gordon Moore, the co-founder of Fairchild Semiconductor and CEO of Intel, whose 1965 paper described a doubling every year in the number of components per integrated circuit, and projected this rate of growth would continue for at least another decade. In 1975, looking forward to the next decade, he revised the forecast to doubling every two years, a compound annual growth rate (CAGR) of 41.4%. The complexity for minimum component costs has increased at a rate of roughly a factor of two per year. Certainly over the short term this rate can be expected to continue, if not to increase. Over the longer term, the rate of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly constant for at least 10 years.In terms of size you can see that we're approaching the size of atoms which is a fundamental barrier, but it'll be two or three generations before we get that far—but that's as far out as we've ever been able to see. We have another 10 to 20 years before we reach a fundamental limit. By then they'll be able to make bigger chips and have transistor budgets in the billions. Moore's law is the observation that the number of transistors in a dense integrated circuit doubles about every two years. The observation is named after Gordon Moore, the co-founder of Fairchild Semiconductor and CEO of Intel, whose 1965 paper described a doubling every year in the number of components per integrated circuit, and projected this rate of growth would continue for at least another decade. In 1975, looking forward to the next decade, he revised the forecast to doubling every two years, a compound annual growth rate (CAGR) of 41.4%. The period is often quoted as 18 months because of a prediction by Intel executive David House (being a combination of the effect of more transistors and the transistors being faster). Moore's prediction proved accurate for several decades and has been used in the semiconductor industry to guide long-term planning and to set targets for research and development (R&D).Advancements in digital electronics are strongly linked to Moore's law: the rapid scaling of MOSFET (metal-oxide-semiconductor field-effect transistor) devices, quality-adjusted microprocessor prices, memory capacity (RAM and flash), sensors, and even the number and size of pixels in digital cameras. Digital electronics has contributed to world economic growth in the late twentieth and early twenty-first centuries.Moore's law describes a driving force of technological and social change, productivity, and economic growth. Moore's law is an observation and projection of a historical trend and not a physical or natural law. Although the rate held steady from 1975 until around 2012, the rate was faster during the first decade. In general, it is not logically sound to extrapolate from the historical growth rate into the indefinite future. For example, the 2010 update to the International Technology Roadmap for Semiconductors predicted that growth would slow around 2013, and in 2015 Gordon Moore foresaw that the rate of progress would reach saturation: 'I see Moore's law dying here in the next decade or so.' Intel stated in 2015 that their pace of advancement has slowed, starting at the 22 nm feature width around 2012, and continuing at 14 nm. Brian Krzanich, the former CEO of Intel, announced, 'Our cadence today is closer to two and a half years than two.' Intel also stated in 2017 that hyperscaling would be able to continue the trend of Moore's law and offset the increased cadence by aggressively scaling beyond the typical doubling of transistors. Krzanich cited Moore's 1975 revision as a precedent for the current deceleration, which results from technical challenges and is 'a natural part of the history of Moore's law'. In the late 2010s, only two semiconductor manufacturers have been able to produce semiconductor nodes that keep pace with Moore's law, TSMC and Samsung Electronics, with 10 nm, 7 nm and 5 nm nodes in production (and plans for 3 nm nodes), whereas the pace has slowed down for Intel and other semiconductor manufacturers. In 1959, Douglas Engelbart discussed the projected downscaling of integrated circuit size in the article 'Microelectronics, and the Art of Similitude'. Engelbart presented his ideas at the 1960 International Solid-State Circuits Conference, where Moore was present in the audience. For the thirty-fifth anniversary issue of Electronics magazine, which was published on April 19, 1965, Gordon E. Moore, who was working as the director of research and development at Fairchild Semiconductor at the time, was asked to predict what was going to happen in the semiconductor components industry over the next ten years. His response was a brief article entitled, 'Cramming more components onto integrated circuits'. Within his editorial, he speculated that by 1975 it would be possible to contain as many as 65,000 components on a single quarter-inch semiconductor. His reasoning was a log-linear relationship between device complexity (higher circuit density at reduced cost) and time. At the 1975 IEEE International Electron Devices Meeting, Moore revised the forecast rate. Semiconductor complexity would continue to double annually until about 1980 after which it would decrease to a rate of doubling approximately every two years. He outlined several contributing factors for this exponential behavior: