language-icon Old Web
English
Sign In

Memory timings

Memory timings or RAM timings describe the performance of synchronous dynamic random-access memory (SDRAM) using four parameters: CL, TRCD, TRP, and TRAS in units of clock cycles; they are commonly written as four numbers separated with dashes, e.g. 7-8-8-24. The fourth (tRAS) is often omitted, or a fifth, the Command rate, sometimes added (normally 2T or 1T, also written 2N, 1N). These parameters specify the latencies (time delays) that affect speed of random access memory. Lower numbers usually imply faster performance. What determines absolute system performance is actual latency time, usually measured in nanoseconds. Memory timings or RAM timings describe the performance of synchronous dynamic random-access memory (SDRAM) using four parameters: CL, TRCD, TRP, and TRAS in units of clock cycles; they are commonly written as four numbers separated with dashes, e.g. 7-8-8-24. The fourth (tRAS) is often omitted, or a fifth, the Command rate, sometimes added (normally 2T or 1T, also written 2N, 1N). These parameters specify the latencies (time delays) that affect speed of random access memory. Lower numbers usually imply faster performance. What determines absolute system performance is actual latency time, usually measured in nanoseconds. When translating memory timings into actual latency, it is important to note that they are in units of clock cycles, which for double data rate memory is half the speed of the commonly quoted transfer rate. Without knowing the clock cycle times, it is impossible to state if one set of numbers is 'faster' than another.

[ "Operating system", "Parallel computing" ]
Parent Topic
Child Topic
    No Parent Topic