Orthogonal instruction set

In computer engineering, an orthogonal instruction set is an instruction set architecture where all instruction types can use all addressing modes. It is 'orthogonal' in the sense that the instruction type and the addressing mode vary independently. An orthogonal instruction set does not impose a limitation that requires a certain instruction to use a specific register so there is little overlapping of instruction functionality. In computer engineering, an orthogonal instruction set is an instruction set architecture where all instruction types can use all addressing modes. It is 'orthogonal' in the sense that the instruction type and the addressing mode vary independently. An orthogonal instruction set does not impose a limitation that requires a certain instruction to use a specific register so there is little overlapping of instruction functionality. Orthogonality was considered a major goal for processor designers in the 1970s, and the VAX-11 is often used as the benchmark for this concept. However, the introduction of RISC design philosophies in the 1980s significantly reversed the trend towards more orthogonality. Modern CPUs often simulate orthogonality in a pre-processing step before performing the actual tasks in a RISC-like core. At their core, all general purpose computers work in the same underlying fashion; data stored in a main memory is read by the central processing unit (CPU), acted on, and then written back to memory. Memory consists of a collection of data values, encoded as numbers and referred to by their address, also a numerical value. This means the same operations applied to the data can be applied to the addresses themselves. While being worked on, data can be temporarily held in processor registers, scratchpad values that can be accessed very quickly. Registers are used, for example, when adding up strings of numbers into a total. In early computers, the instruction set architecture (ISA) often used a single register, in which case it was known as the accumulator. Instructions included an address for the operand. For instance, an ADD address instruction would cause the CPU to retrieve the number in memory found at that address and then add it to the value already in the accumulator. This very simple example ISA has a 'one-address format' because each instruction includes the address of the data. One-address machines have the disadvantage that even simple actions like an addition require multiple instructions, each of which takes up scarce memory, and requires time to be read. Consider the simple task of adding two numbers, 5 + 4. In this case, the program would have to load the value 5 into the accumulator with the LOAD address instruction, use the ADD address instruction pointing to the address for the 4, and finally SAVE address to store the result, 9, back to another memory location. Further improvements can be found by providing the address of both of the operands in a single instruction, for instance, ADD address 1, address 2. Such 'two-address format' ISAs are very common. One can further extend the concept to a 'three-address format' where the SAVE is also folded into an expanded ADD address 1, address 2, address of result. It is often the case that the basic computer word is much larger than needed to hold just the instruction and an address, and in most systems, there are leftover bits that can be used to hold a constant instead of an address. Instructions can be further improved if they allow any one of the operands to be replaced by a constant. For instance, ADD address 1, constant 1 eliminates one memory cycle, and ADD constant 1, constant 2 another. Further complexity arises when one considers common patterns in which memory is accessed. One very common pattern is that a single operation may be applied across a large amount of similar data. For instance, one might want to add up 1,000 numbers. In a simple two-address format, there is no way to change the address, so 1,000 additions have to be written in the machine language. ISAs fix this problem with the concept of indirect addressing, in which the address of the next point of data is not a constant, but itself held in memory. This means the programmer can change the address by performing addition on that memory location. ISAs also often include the ability to offset an address from an initial location, by adding a value held in one of its registers, in some cases a special index register. Others carry out this addition automatically as part of the instructions that use it. The variety of addressing modes leads to a profusion of slightly different instructions. Considering a one-address ISA, for even a single instruction, ADD, we now have many possible 'addressing modes':