Shin-ichi Kinouchi

Mitsubishi Electric (Japan)

Author Statistics

Papers

Citation

H-Index

i-10 index

Research Trends

Author Order

Document Type

Co-Authors

Hirofumi Akagi

Tokyo Institute of Technology

Takeshi Horiguchi

Mitsubishi Electric (Japan)

S. Tominaga

Tokyo Institute of Technology

Takeshi Oi

Mitsubishi Electric (Germany)

Hiroaki Urushibata

Kanazawa Institute of Technology

Hideaki Fujita

Tokyo Institute of Technology

Yasushi Nakayama

Mitsubishi Electric (Japan)

Toshio Umemura

Mitsubishi Electric (United States)

Kunihiko Egawa

Mitsubishi Electric (Japan)

Masato Koyama

Mie University

Cooperative Institutions

Mitsubishi Electric (Japan)

Mitsubishi Electric (Germany)

Mitsubishi Group (Japan)

Tokyo Institute of Technology

Mitsubishi Electric (United States)

Osaka University

The University of Tokyo

Kyoto University

Shizuoka University

Weatherford College

Author Statistics

Papers

Citation

H-Index

i-10 index

Research Field

Characterization and Modeling of a 1.2-kV 30-A Silicon-Carbide MOSFET

IEEE Transactions on Electron Devices (2016)

Yasushige Mukunoki Yuta Nakamura Takeshi Horiguchi Shin-ichi Kinouchi Yasushi Nakayama

This paper describes a novel compact model for a SiC-MOSFET. The model is useful to achieve accurate simulation of output characteristics from a linear region to a saturation region, selecting both gate-source voltage and temperature as parameters. In order to construct the model systematically, attention is paid to a physics-based modeling procedure with channel mobility as an adjustable parameter. The model also features characterization and modeling of an internal drain-gate capacitor. The model shows fairly good agreement in the output characteristics and the dynamic behavior of both gate drive circuit and main power circuits between the experimental and simulated results. This successful validation indicates that this model offers a promising circuit-based simulation tool for designing whole power conversion systems using SiC-MOSFETs.

Power MOSFET

Semiconductor device modeling

10.1109/ted.2016.2606424

Cite

Citations (29)

An Application of a Physics-based IGBT Model to a Protection Circuit for Short-Circuit Conditions

IEEJ Transactions on Industry Applications (2014)

Shoji Okamoto Takeshi Horiguchi S. Tominaga T. Nishimura Hideaki Fujita

This paper presents a protection circuit for a fault under load (FUL). The protection circuit is characterized by the reverse transfer capacitance characteristic of IGBTs. The reverse transfer capacitance depends on the collector-emitter voltage and has a significant influence on the switching behavior under short-circuit conditions and normal conditions. An FUL is detected by monitoring a gate current because the current flows through the reverse transfer capacitance of IGBTs from the collector terminal to the gate terminal under FUL conditions. A physics-based IGBT model shows high accuracy for both static and dynamic characteristics, making it useful for developing a protection circuit for IGBTs subjected to short-circuit conditions. Simulated results using the physics-based IGBT model and experimental results verify the validity of the proposed protection circuit.

Insulated-gate bipolar transistor

10.1541/ieejias.134.853

Cite

Citations (5)

Temperature Analysis of Parallel-Connected IGBTs under PWM Operating Conditions Using a Physics Model

IEEJ Transactions on Industry Applications (2014)

Takeshi Horiguchi Kohei Tsukamoto S. Tominaga T. Nishimura Hideaki Fujita

This paper presents a physics-based IGBT model and a junction temperature analysis of parallel-connected IGBTs under PWM operating conditions using a physics-based IGBT model. The authors developed a physics-based IGBT model in which the excess carrier distribution within a drift region is represented using a one-dimentional ambipolar diffusion equation. The physics-based IGBT model makes it possible to predict losses and switching waveforms for converter applications. IGBTs are connected in parallel for medium- or large-capacity converters. In these applications, a transient current imbalance might occur owing to a difference in the wiring inductance or device characteristics between the IGBTs. An experiment shows that a difference in the wiring inductance between the two IGBTs causes a transient current imbalance, and the result is in excellent agreement with the result of a simulation using the physics-based IGBT model. The two parallel-connected IGBTs in this study correspond to a power module for 3.7kW motor drives, and the junction temperatures of both IGBTs are simulated by electro-thermal simulation under the following two conditions: a difference in the wiring inductance and a difference in the device characteristics. The temperature difference between the two IGBTs is approximately 4-7℃ under the applied conditions: a wiring inductance mismatch (20nH) and a threshold voltage mismatch (0.5V). The validity of the physics-based IGBT model is verified, and the model is found to be very useful when designing power converters.

Insulated-gate bipolar transistor

Transient (computer programming)

Current injection technique

10.1541/ieejias.134.486

Cite

Citations (2)

A High-Speed Protection Circuit for IGBTs Subjected to Hard-Switching Faults

IEEE Transactions on Industry Applications (2014)

Takeshi Horiguchi Shin-ichi Kinouchi Yasushi Nakayama Takeshi Oi Hiroaki Urushibata

This paper describes a high-speed protection circuit for insulated-gate bipolar transistors (IGBTs) subjected to hard-switching faults (HSFs). The reverse transfer capacitance depends on the collector-emitter voltage, and it produces a significant effect on the switching behavior not only under normal conditions but also under HSF conditions. A gate charge characteristic under HSF conditions differs from that under normal turn-on conditions. Hence, an HSF can be detected by monitoring both the gate-emitter voltage and the amount of gate charge during the turn-on transient period. IGBTs can be rapidly protected from destruction by using this method because a blanking time is unnecessary. Simulation and experiment verify the validity of the proposed high-speed protection circuit.

Insulated-gate bipolar transistor

Transient (computer programming)

Blanking

Current injection technique

Switching time

Gate turn-off thyristor

10.1109/tia.2014.2354402

Cite

Citations (17)

Flux creep in the melt‐processed Bi‐based oxide superconductors including normal particles

Journal of Applied Physics (1992)

Toshio Umemura Kunihiko Egawa Shin-ichi Kinouchi Junji Tanimura Ayumi Nozaki

The Bi-based (2212) single grains including a large number of normal particles, (Ca,Sr)2Cu1O3, were synthesized by a melt process. To characterize the flux creep behavior in such a superconductor, magnetization measurements were performed at various temperatures and magnetic fields. The flux creep rate exhibited a maximum at 20 K in both magnetic fields parallel and normal to c axis. The magnetic field dependence of the pinning potential, U0, evaluated from the residual magnetization was not represented by the expression, B−α, in Y1Ba2Cu3O7 superconductors. The relation between U0 and the critical current density is discussed.

Type-II superconductor

10.1063/1.351051

Cite

Citations (5)

Short-Circuit Protection Method Based on a Gate Charge Characteristic

IEEJ Journal of Industry Applications (2015)

Takeshi Horiguchi Shin-ichi Kinouchi Yasushi Nakayama Takeshi Oi Hiroaki Urushibata

This paper describes a high-speed protection circuit against a hard-switching fault (HSF) and a fault under load (FUL). The demand for high-speed protection circuits for insulated-gate bipolar transistors (IGBTs) subjected to an HSF increases with increasing power density of power semiconductor devices. The reverse transfer capacitance of an IGBT depends on the collector-emitter voltage, such that it produces a significant effect on the switching behavior under HSF conditions as well as under normal conditions. Accordingly, a significant difference appears in the gate charge characteristics between under HSF conditions and under normal turn-on conditions. Hence, an HSF can be detected by monitoring the gate-emitter voltage and the amount of gate charge. IGBTs can be rapidly protected from destruction because no blanking time is required. An FUL can be also detected by the same protection procedure because a gate charge characteristic under FUL conditions also differs from that under normal turn-on conditions. Simulated and experimental results verify the validity of the novel protection circuit based on a gate charge characteristic.

10.1541/ieejjia.4.360

Cite

Citations (4)

Effect of Pt on Crystallization of Bi-Sr-Ca-Cu-O by Melt Process

Japanese Journal of Applied Physics (1992)

Toshio Umemura Shin-ichi Kinouchi Kunihiko Egawa Ayumi Nozaki Shin Utsunomiya

We have investigated the effect of Pt on crystallization of Bi 2 Sr 2 Ca 1 Cu 2 O y prepared by the melt process. By observing the microstructure of specimens rapidly cooled in the process of crystallization, we found that the Pt restrained the growth of the Ca 2 Cu 1 O 3 phase and even of superconducting phases. It was found that Pt formed oxides preferentially with Ca and Sr early in the crystallization process, however, such products didn't seem to grow coarsely.

10.1143/jjap.31.l154

Cite

Citations (2)

Microstructure and Superconducting Properties of Bi-Sr-Ca-Cu-O System Prepared by a Melt Process

Japanese Journal of Applied Physics (1991)

Kunihiko Egawa Toshio Umemura Shin-ichi Kinouchi M. Wakata Shin Utsunomiya

The microstructure and superconducting properties for samples with the nominal composition of Bi 2 Sr 2 Ca 1+2 x Cu 2+ x O y ( x =0, 0.2, 1.0) prepared by a melt process have been examined. The magnetic field dependence of the intragrain critical current density was improved by enriching the Ca and Cu contents. Such samples included two kinds of precipitates, (Ca, Sr) 2 CuO y and Sr-Pt-O compounds. The latter precipitates were much smaller in size than the former, and this suggests that they may be more effective in enhancing the pinning force.

10.1143/jjap.30.l1160

Cite

Citations (9)

Power-Loss Breakdown of a 750-V 100-kW 20-kHz Bidirectional Isolated DC–DC Converter Using SiC-MOSFET/SBD Dual Modules

IEEE Transactions on Industry Applications (2014)

Hirofumi Akagi T. Yamagishi Nadia M. L. Tan Shin-ichi Kinouchi Yuji Miyazaki

This paper describes the design, construction, and testing of a 750-V 100-kW 20-kHz bidirectional isolated dual-active-bridge dc-dc converter using four 1.2-kV 400-A SiC-MOSFET/SBD dual modules. The maximum conversion efficiency from the dc-input to the dc-output terminals is accurately measured to be as high as 98.7% at 42-kW operation. The overall power loss at the rated-power (100 kW) operation, excluding the gate-drive and control circuit losses, is divided into the conduction and switching losses produced by the SiC modules, the iron and copper losses due to magnetic devices, and the other unknown loss. The power-loss breakdown concludes that the sum of the conduction and switching losses is about 60% of the overall power loss and that the conduction loss is nearly equal to the switching loss at the 100-kW and 20-kHz operation.

Power loss

10.1109/tia.2014.2331426

Cite

Citations (121)

A fast short-circuit protection method using gate charge characteristics of SiC MOSFETs

2022 IEEE Energy Conversion Congress and Exposition (ECCE) (2015)

Takeshi Horiguchi Shin-ichi Kinouchi Yasushi Nakayama Hirofumi Akagi

This paper describes a fast protection circuit for silicon carbide metal-oxide semiconductor field-effect transistors (SiC MOSFETs) subjected to hard-switching faults (HSFs). In terms of reliability of power converters, the protection of power semiconductors against short-circuit failures is of great concern. The reverse transfer capacitance increases with decreasing drain-source voltage during normal turn-on transient. Under HSF conditions, on the other hand, it hardly changes because the drain-source voltage remains high. As a consequence, quite a significant difference appears in gate charge characteristics between under HSF conditions and normal turn-on operation. Hence, an HSF can be detected by monitoring both the gate- source voltage and the amount of gate charge. The proposed protection circuit has high noise tolerance because it monitors not only the gate-source voltage but also the amount of gate charge. The validity of the protection circuit is verified by experiment. The proposed protection circuit can detect the HSF within only one microsecond.

Power MOSFET

10.1109/ecce.2015.7310332

Cite

Citations (62)