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Sudakar Singh Chauhan

Guru Ghasidas Vishwavidyalaya

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Sanjay Kumar

Birla Institute of Technology, Mesra

Gaurav Verma

Uttar Pradesh Pandit Deen Dayal Upadhyaya Pashu Chikitsa Vigyan Vishwavidyalaya Evam Go-Anusandhan Sansthan

Neha Paras

National Institute of Technology Delhi

Rajiv Kumar

Shobhit University

Gaurav Verma

National Institute of Technology Kurukshetra

Sapna Singh

National Institute of Technology Kurukshetra

Seema Narwal

National Institute of Technology Kurukshetra

Neeraj Sharma

SRM University

Seema Seema

National Institute of Technology Kurukshetra

Arun Sunny

National Institute of Technology Kurukshetra

Cooperative Institutions

National Institute of Technology Kurukshetra

The Christie NHS Foundation Trust

Graphic Era University

The Christie Hospital

Guru Ghasidas Vishwavidyalaya

Indian Institute of Technology Roorkee

Madan Mohan Malaviya University of Technology

Indian Institute of Technology Delhi

Jaypee Institute of Information Technology

Deen Dayal Upadhyaya Gorakhpur University

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Thin Metal-Free THz Absorbers: Broadband Sensing Solutions

Iptesam Aaliya Qureshi Anil Kumar Soni Sudakar Singh Chauhan

10.1109/ic3tes62412.2024.10877433

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Impact of spacer-drain workfunction engineered on the characteristics of a Si-Ge dopingless tunnel field effect transistor with lower subthreshold swing

Sudakar Singh Chauhan Neha Sharma R. Bhavani Shankar Naik

The impact of spacer and dual metal drain on Subthreshold Swing (SS) and ON current of the dopingless TFETs have been examined in this paper using Si and Ge as channel material. In the proposed device spacers are used on either side of the drain and source regions with a dielectric constant of 22, i.e., Hafnium oxide (HfO ₂ ) of length 15 nm and 5 nm respectively. Source and drain region are formed using charge plasma concept in the proposed device because it was based on dopingless technology. We use dual metal on drain electrode to creating a potential barrier to restricting the tunneling of holes when the negative gate voltage applied. Therefore, the proposed device offers high I _ON /I _OFF ratio of 10 ¹¹ , smaller point SS of 37 mV/decade and average SS of mV/decade etc. We have also measure spacer effect between the proposed device and dual metal drain (DMD) dopingless double gate TFETs without spacer.

Subthreshold Swing

10.1109/rteict.2017.8256623

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Optimization of Design Parameters for Vertical Tunneling Based Dual Metal Dual Gate TFET

Neha Paras Sudakar Singh Chauhan

In this paper, an optimally designed vertical tunneling based dual metal dual gate tunnel field effect transistor (DMDG-VTFET) is presented. The design parameters are chosen so as to fulfill the high-performance ON-state current of 1.33 μA, low standby power OFF-state current nearly 50.5 aA and Subthreshold Swing (SS) of 11 mV/decade. Moreover, the proposed TFET follows the International Technology Roadmap for Semiconductors (ITRS) roadmap for low standby power switch performance as ON current/ OFF current ratio (I _on / I _off ) of the order of 10 ¹² is obtained. Such results are attributed to the dominant carrier tunneling of the device which is in line with the gate electric field. This suppressed the lateral tunneling path which was responsible for the depreciation of the subthreshold slope, thus resulting in a super-steep subthreshold slope. By selecting appropriate work function on tunnel gate and auxiliary gate; I _on , I _off and threshold voltage V _T are significantly improved. Impact of epitaxial region height, source, channel, drain and epitaxial region doping concentration, spacer and dielectric material on ambipolarity of the device is thoroughly studied.

Subthreshold slope

10.1109/icacce46606.2019.9079988

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Investigation of RF and linearity performance of electrode work‐function engineered HDB vertical TFET

Micro & Nano Letters (2018)

Seema Narwal Sudakar Singh Chauhan

This work realises a hetero‐dielectric buried oxide vertical tunnel field effect transistor (HDB VTFET) and investigates its radio frequency (RF) and linearity characteristics. First time, the concept of hetero‐dielectric buried oxide (BOX) in VTFET is used to obtain the superior improvement in terms of different RF and linearity figure of merits such as , , , , Gain Bandwidth Product (GBP), , Transconductance Frequency Product (TFP), Transconductance Generation Factor (TGF), , , , , , and 1‐dB compression point. Also, the influence of HfO 2 BOX length scaling on these FOMs is analysed. The results reveal that the HDB VTFET can be a promising contender to replace bulk metal‐oxide semiconductor field‐effect transistors in analogue/mixed signal system‐on‐chip and high‐frequency microwave applications and the accuracy of this device is validated by TCAD Sentaurus simulator.

Linearity

10.1049/mnl.2018.5307

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Characteristics Analysis of Si0.5Ge0.5 Doping-Less PNPN TFET

Lecture notes in electrical engineering (2018)

Sudakar Singh Chauhan Gaurav Verma Vinod Naik

10.1007/978-981-10-8240-5_22

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Physical layer security for multiuser multi‐eavesdropper multi‐input multi‐output (MIMO) system in the presence of imperfect feedback

International Journal of Communication Systems (2020)

Rajiv Kumar Sudakar Singh Chauhan

Summary In this work, we analyze the physical layer security (PLS) for a multiuser (MUS) multi‐input multi‐output multi‐eavesdropper (MIMOME) wireless network using selection transmission (ST) at the base station (BS) with maximum ratio combining (MRC) at both of the receivers, receivers of legitimate users (LUs) as well as the receivers of illegitimate users over an uncorrelated Rayleigh fading channel. In this scenario, multiple users communicate to a BS at the same time multiple eavesdropper user may intercept the transmission. Next, we drive exact closed‐form expression for probability of nonzero secrecy capacity (PNZSC) and secrecy outage probability (SOP) in the presence of imperfect channel state information (ICSI). At last, we present the simulation results to authenticate the analytical results and analyze the impact of ICSI on PLS of MUS‐MIMOME system.

Channel state information

Outage Probability

10.1002/dac.4604

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TCAD simulations of double gate tunnel field effect transistor with spacer drain overlap base on vertical Tunneling

2017 International conference of Electronics, Communication and Aerospace Technology (ICECA) (2017)

Sapna Singh Sudakar Singh Chauhan

Effects of the spacer-drain overlap on the performance parameters of the double gate tunnel field effect transistor is proposed and investigated in this paper. By proper fabrication of the spacer-drain overlap, we can obtain a lower sub-threshold swing, smaller short channel effect (SCEs), i.e. drain induced barrier lowering (DIBL), higher ON-state current (ION) and considerably less OFF-state current (IOFF). Here we also measure effects of the channel length variation of the device. In this paper, we compare the proposed device with single gate tunnel FET with spacer-drain overlap using vertical tunneling concept. So we can observed, that the proposed device gives better performance parameters.

Tunnel field-effect transistor

Drain-induced barrier lowering

Double gate

10.1109/iceca.2017.8212708

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Physical layer security of MIMO STBC over Rayleigh fading channels in the presence of channel estimation error

Sudakar Singh Chauhan Pankaj Verma Mukesh Mathur Mansi Agarwal Tushar Gupta

Space–time block code

10.1016/j.ijleo.2016.05.086

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TCAD simulation of Ge-GaAs hetrojunction dopingless tunnel field effect transistor

Ruchi Juyal Sudakar Singh Chauhan

This paper presents a TCAD study on the performance of Si and Ge-GaAs hetrojunction dopingless tunnel field effect transistor (TFETs). Si tunnel device have low on current. So hetrojunction architecture is combined with dopingless structure for improving on current with smaller off current. Dopingless architecture uses low thermal budget for fabrication so hetrojunction dopingless TFET are suitable for low power low cost application. By comparison it is found that Ge-GaAs and Ge-Si devices have increased on current in compare to Si dopingless TFET but off current in Ge-GaAs devices is lower than Ge-Si device. In further steps capacitance of Ge-GaAs are also compared to Si Dopingless TFET. All simulation are done using Sentaurus TCAD simulator.

Tunnel field-effect transistor

10.1109/iccsp.2016.7754393

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Physical layer security for space–time-block-coded MIMO system in Rician fading in the presence of imperfect feedback

Wireless Networks (2020)

Rajiv Kumar Sudakar Singh Chauhan

Rician fading

Space–time block code

Channel state information

10.1007/s11276-020-02327-x

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