Aerospace microwave LTCC substrates are all-gold material systems with Pt and Au as the main components of the lead-tin resistant solder film, which forms an intermetallic compound (IMC) layer at the solder interface after 63Sn-37Pb soldering. Structure and composition of LTCC film are analyzed, while the risk of solder joint in the subsequent assembly is evaluated. Based on the diffusion principle, the relationship between the growth rate of IMC layer and temperature after soldering is established. The tolerance of LTCC solder joints to different baking temperatures is also calculated based on the IMC layer growth rate. According to the research results of this paper, the recommended baking temperature for post-solder assembly is up to 120°C.
The shrinkage of metal oxide semiconductor field effect transistor (MOSFET) to the small size of the nanoscale results in changes in their channel current noise composition. This paper determines the channel current noise composition of 90 nm MOSFET through experiments, and according to the device material and noise characteristics analysis, the channel current noise of 90 nm and below is obtained, which not only contains thermal noise and suppressed channel shot noise, but also adds suppressed gate tunneling shot noise and cross-correlation noise. Then, Monte Carlo simulation of 10 nm MOSFET noise is further used to determine the channel current composition of small size nanoscale devices. Subsequently, based on the device structure and fundamental characteristics of channel current noise, the channel current noise model is established. Finally, this model is employed to analyze the relationship between thermal noise, suppressed shot noise, cross-correlation noise, and channel current noise in relation to bias parameters and device characteristics. The theoretical results are basically consistent with the experimental and the simulated results, and the channel noise increases with the increase of bias voltage. This achievement holds promise for enhancing the operational efficiency, reliability, and lifetime of nanoscale small-sized MOSFET devices.
Avalanche photodiodes (APDs) produce noise during operation, which affects the device performance. However, the previous research on its noise is mainly theoretical analysis and is only reflected as optical noise. Therefore, according to the characteristics of APD material and the mechanism of noise generation, the main noise of the device is analyzed in this paper. First, the test method of noise in APDs is established, including testing of dark noise, optical noise, and multiplication noise in high frequency bands. The main noises in APDs are 1/f noise, thermal noise, shot noise, generation recombination noise, and multiplication shot noise, and shot noise is suppressed by Fermi–Dirac distribution and Coulomb action. Second, the reliability of APDs is evaluated by measuring and analyzing the noise parameters of the device through thermal aging experiments. It is concluded that the defects introduced by thermal aging can be reflected by the change in noise, which is consistent with the results in the literature. This method can comprehensively obtain the noise in APDs, which is helpful to improve the working efficiency, life, and reliability of the device.
With the proportional reduction of metal–oxide–semiconductor field effect transistor (MOSFET) devices, the short channel effect, the parasitic effect, and the field strength effect are significantly enhanced, the proportion of parasitic resistance increases, and the non-intrinsic noise also increases, which seriously affects the working efficiency of the device. However, existing research mainly focuses on the intrinsic noise of MOSFET, and there is little research on the non-intrinsic noise; furthermore, the models describing the relationship between non-intrinsic noise, device structure, and bias have not yet been addressed. Therefore, in this paper, 90, 65, 32, 10, and 5 nm MOSFETs are studied. The rate of the intrinsic ballistic parameter is introduced to set up the source–drain current model and the non-intrinsic noise model. The source–drain current model is consistent with the theoretical model, numerical simulation, and experimental results in the literature. Finally, the relationship between the non-intrinsic noise and the bias and the device parameters are analyzed, and the conclusion is helpful to improve the working efficiency, lifetime, and response speed of nanoscale MOSFET devices.
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