Jae‐Jin Lee

Electronics and Telecommunications Research Institute

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Kwang‐Il Oh

Electronics and Telecommunications Research Institute

Kyuseung Han

Electronics and Telecommunications Research Institute

Woojoo Lee

Chung-Ang University

Taewook Kang

Electronics and Telecommunications Research Institute

Sukho Lee

Institute for Basic Science

Yang‐Ki Hong

University of Alabama

Hao-Han Hsu

Intel (United States)

Sung‐Eun Kim

Electronics and Telecommunications Research Institute

Hyeonguk Jang

Electronics and Telecommunications Research Institute

Seok Bae

Korea Innotech (South Korea)

Cooperative Institutions

Electronics and Telecommunications Research Institute

108

Seoul National University

Korea Advanced Institute of Science and Technology

Samsung (South Korea)

SK Group (South Korea)

Korea University

Hanyang University

Yonsei University

Pohang University of Science and Technology

Chung-Ang University

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Co$_{2}$Z Hexaferrite T-DMB Antenna for Mobile Phone Applications

IEEE Transactions on Magnetics (2009)

Seok Bae Yang‐Ki Hong Jae‐Jin Lee Jeevan Jalli Gavin S. Abo

We fabricated 0.029 lambda miniaturized Co ₂ Z hexaferrite terrestrial digital multimedia broadcasting (T-DMB) antenna. T-DMB antenna was fabricated by winding 12-turn Cu tape around the Co ₂ Z rectangular block. Antenna was mounted on the ground substrate with connection of coaxial feeding line. Fabricated Co ₂ Z antenna showed 196.2 MHz of center frequency, -6.55 dB of 3-D average gain and 22.13% of radiation efficiency at 195 MHz. Average gain of Co ₂ Z antenna is found to be greater than -17.4 dB in the range of 174-216 MHz .

10.1109/tmag.2009.2022412

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Citations (21)

Aldebaran4コアに基づく仮想SoCプラットフォーム【Powered by NICT】

IEEE Conference Proceedings (2016)

Jae‐Jin Lee Young-Su Kwon

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An ACS for a Viterbi Decoder Using a High-Speed Low-Power Comparator

The Journal of Korean Institute of Communications and Information Sciences (2004)

Youpyo Hong Jae‐Jin Lee

Viterbi decoders are widely used for communication and high-density storage devices. An add-compare-select(ACS) unit has been an active research area for a long time because it is the most critical component in determining the operation speed and power-consumption of the Viterbi decoder. We propose a new comparator which is faster and consumes less power than existing ones. We also used the new comparator for a Viterbi decoder and our simulations results show the Viterbi decoder outperforms existing ones at least in its operating speed.

Viterbi decoder

Viterbi algorithm

Soft-decision decoder

Iterative Viterbi decoding

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25.2 A 1.2V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV

Dong Uk Lee Kyung Whan Kim Kwan Weon Kim Hongjung Kim Ju Young Kim

Increasing demand for higher-bandwidth DRAM drive TSV technology development. With the capacity of fine-pitch wide I/O [1], DRAM can be directly integrated on the interposer or host chip and communicate with the memory controller. However, there are many limitations, such as reliability and testability, in developing the technology. It is advantageous to adopt a logic-interface chip between the interposer and stacked-DRAM with thousands of TSV. The logic interface chip in the base level of high-bandwidth memory (HBM) decreases the C IO , repairs the chip-to-chip connection failure, and supports better testability and improves reliability.

Dram

Interposer

10.1109/isscc.2014.6757501

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Citations (219)

Implementation of an Edge Detector with SystemC

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications (2006)

Young-Jin Oh Jae‐Jin Lee Gi-Yong Song

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POSTER

Gangwon Jo Jaehoon Jung Jiyoung Park Jae‐Jin Lee

Various existing optimization and memory consistency management techniques for GPU applications rely on memory access patterns of kernels. However, they suffer from poor practicality because they require explicit user interventions to extract kernel memory access patterns. This paper proposes an automatic memory-access-pattern analysis framework called MAPA. MAPA is based on a source-level analysis technique derived from traditional symbolic analyses and a run-time pattern selection technique. The experimental results show that MAPA properly analyzes 116 real-world OpenCL kernels from Rodinia and Parboil.

Kernel (algebra)

Access method

10.1145/3018743.3019034

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Incorporation of Electromagnetic Ion cyclotron waveinto Radiation Belt environment model

한국천문학회보 (2012)

S. B. Kang Eunjin Choi Junga Hwang Kyung-chan Kim Jae‐Jin Lee

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Modeling of the Inter-Page Interference on the Holographic Data Storage Systems

The Journal of Korean Institute of Communications and Information Sciences (2010)

Dong‐Hyuk Park Jae‐Jin Lee

The holographic data storage system stores multiple data pages by multiplexing. But the inter-page interference(IPI) caused by multiplexing reduces the intensity of the hologram. The simulation of the holographic storage systems has to consider the IPI. Therefore, we introduce a channel modeling that takes care of inter-page interference in the holographic data storage system. We simulate the performance of PRML detection on the hologrpahic data storage system with IPI modeling.

Holographic Data Storage

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PAPR Reduction of OFDM Signals Based on Dirty Paper Coding

ICEIC : International Conference on Electronics, Informations and Communications (2008)

Mochan Yang Jaewoon Kim Sangin Kim Jin‐Young Kim Jae‐Jin Lee

We propose a new technique based on DPC (Dirty Paper Coding) to effectively reduce the PAPR (Peakto-Average Power Ratio) of OFDM (Orthogonal Frequency Division Multiplexing) signals without large computational overhead. At transmitter, the proposed scheme is composed of an antenna transmitting the original information signal and additional antenna transmitting the interference signal generated for the DPC decoding. In the encoding procedure of the information signal, the dither signal is fixed to the bit stream having the lowest PAPR so that the proposed scheme ensures the lowest PAPR and provides almost equal bit error rate performance of the conventional OFDM without any PAPR reduction schemes.

Dither

SIGNAL (programming language)

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A java compiler for many memory models - extended abstract

Samuel P. Midkiff Jae‐Jin Lee David Padua

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