Guoyi Yu

Huazhong University of Science and Technology

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Xuecheng Zou

Wuhan National Laboratory for Optoelectronics

Chao Wang

Huazhong University of Science and Technology

Yi Zhan

University of Macau

Bingqiang Liu

Hebei Academy of Agriculture and Forestry Sciences

Jiarui Xu

Huazhong University of Science and Technology

Zixuan Peng

Beijing Jiaotong University

Jipeng Wang

Huazhong University of Science and Technology

Jiajun Wu

University of Hong Kong

Kwen‐Siong Chong

Nanyang Technological University

Ao Hu

Huazhong University of Science and Technology

Cooperative Institutions

Guidewire (United States)

249

Cytoskeleton (United States)

243

Chinese Academy of Sciences

Huazhong University of Science and Technology

University of Chinese Academy of Sciences

Shanghai Jiao Tong University

Zhejiang University

Harbin Institute of Technology

Central South University

Beijing Institute of Technology

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A novel current reference based on subthreshold MOSFETs with high PSRR

Microelectronics Journal (2007)

Guoyi Yu Xuecheng Zou

A novel current reference based on subthreshold MOSFETs with high power supply rejection ratio (PSRR) is presented. The proposed circuit takes full advantages of the I–V transconductance characteristics of MOSFET operating in the subthreshold region and the enhancement pre-regulator with the high gain negative feedback loop for the current reference core circuit. The proposed circuit, designed with the SMIC 0.18 μm standard CMOS logic process technology, exhibits a stable current of about 1.701 μA with much low temperature coefficient of 2.5×10−4 μA/°C in the temperature range of −40 to 150 °C at 1.5 V supply voltage, and also achieves a best PSRR over a broad frequency. The PSRR is about −126 dB at dc frequency and remains −92 dB at the frequency higher 1 MHz. The proposed circuit operates stably at the supply voltage higher 1.2 V and has good process compatibility.

Subthreshold conduction

Transconductance

Frequency compensation

10.1016/j.mejo.2007.09.015

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Citations (12)

A 90nm CMOS wide-band voltage-controlled ring oscillator for digital TV-tuner

Kai Yu Xuecheng Zou Jianming Lei Guoyi Yu Sizhen Li

A voltage-controlled ring oscillator in 90nm CMOS technology with ultra wide-band and low phase noise for digital TV-tuner is presented. By introducing pre-amplifying transistors to get novel four outputs delay stage, tuning range is greatly widened. Pre-charging transistors with optimized control method decrease phase noise without increasing parasitic capacitances. The oscillator can be operated from 38MHz to 1.38GHz, while worst phase noises are −107dBc/Hz at 1MHz offset and −85dBc/Hz at 100 KHz offset in full frequency range. It maximally consumes 11.1mA with 1.8V supply voltage.

Tuner

Ring oscillator

Digitally controlled oscillator

10.1109/apccas.2008.4746282

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Citations (2)

Design of high-performance transconductance error amplifier for DC-DC converter

Zhou Yefeng Guoyi Yu Zheng Meijun Le Zhang

A high-performance transconductance error amplifier is presented for DC-DC converters. The amplifier designed in this paper is composed of OVA (Operational Voltage Amplifier) and OFA (Operational Floating Amplifier). The OVA is designed as cascode structure and provides a high voltage gain, while the OFA is designed to enhance the transconductance and improve driving capability of the error amplifier. The performance of the error amplifier presented is improved effectively. Using SMIC 0.35 μm CMOS process technology to stimulate the designed circuits, the results show that the transconductance error amplifier achieved an open loop voltage gain of 57 dB and a transconductance of 191 μS.

Operational transconductance amplifier

Direct-coupled amplifier

Transconductance

Common source

FET amplifier

Fully differential amplifier

Current-feedback operational amplifier

Cascade amplifier

10.1109/mec.2011.6025720

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Preparation of a new gate dielectric material HfTiON film

The Journal of China Universities of Posts and Telecommunications (2007)

Guoyi Yu Xuecheng Zou Weibing Chen

Forming gas

Fixed charge

High-κ dielectric

10.1016/s1005-8885(07)60060-0

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Citations (2)

A low-noise high-gain transimpedance amplifier with high dynamic range in 0.13ìm CMOS

Guoyi Yu Xuecheng Zou Le Zhang Qiming Zou Zheng Meijun

This paper designed a low-noise high-gain tran simpedance amplifier with high dynamic range. The input stage of TIA uses an individual power supply to accommodate the level of the photodiode(PD). Then the signal is transmitted to the subsequent circuit by a level shifting circuit. The TIA adopts DCrestore to stabilize work points, and uses a MOS working in the linear region to reduce the effective input signal to realize high dynamic range. Key noise components are optimized to reduce the input referred current noise. This TIA was validated in 0.13 urn CMOS. The simulation results show the -3dB bandwidth is 1.8GHz, the maximum gain is 82.27dB Ω, the input referred noise is 125nA, and the measure current ranges 5uA ~2mA.

Transimpedance amplifier

Open-loop gain

Wide dynamic range

10.1109/rfit.2012.6401606

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Citations (3)

A High Precision CMOS Current-mode Band-gap Voltage Reference

Guoyi Yu Xuecheng Zou

A new high precision CMOS current-mode band-gap voltage reference which takes advantage of the high-order curvature-compensated technique and the enhancement pre-regulator technique is proposed. Based on the 1 ^st 0.35mum standard mixed-signal CMOS process technology, the circuit achieves a much low temperature coefficient of 3.68ppm/degC over the temperature range of -40 degC to +150degC with 1.00V output reference voltage and a high PSRR over a broad frequency range. The PSRR is -125.4dB at 100Hz and remains -59.2dB at 100MHz. Using push-pull output stage instead of the bias circuits, the power dissipation is only about 50muW

Bandgap voltage reference

Biasing

10.1109/icsict.2006.306410

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Citations (4)

A Broad-Bandwidth Cascode-Feedback Transimpedance Amplifier for Short-Range Optical Communication

Xiangyi Zhang Zhenghao Lu Wenming Zhu Weitao Yuan Yuansheng Zhao

Recently, demands in short-range optical communications with high integration are increasing very fast, and transimpedance amplifiers (TIAs) play a significant role in optical communication systems. This paper presents a broad-bandwidth TIA, which investigates the design strategy of the regulated cascode (RGC) TIA under low supply voltage. The proposed TIA includes a cascode-feedback RGC input stage with transistors working in weak inversion to achieve an optimized trade-off among bandwidth, low supply, power consumption and noise. Capacitive degeneration is used to further extend the bandwidth. In 40-nm CMOS, the proposed TIA under 1.2 V can achieve a -3dB bandwidth of 8.65 GHz with 0.25 pF photodiode capacitance and 0.15 pF load capacitance. The total input-referred noise current is $\mathbf{2.47}\ \boldsymbol{\mu} \mathbf{A}$ . The core TIA occupies 0.003 mm ² while the DC power consumption is 2.46 mW without the output buffer. Compared with related TIA works, the proposed TIA achieves comparable bandwidth performance and a $\mathbf{2}\times\sim \mathbf{3.5}\times$ figure of merit enhancement.

Transimpedance amplifier

Cascode

Figure of Merit

Photodiode

10.1109/iccs59502.2023.10367222

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A Novel Area-Efficient Fast CORDIC for Energy-efficient Adaptive Exponential Integrate and Fire Neuron Design

2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) (2021)

Yujie Li Guangyou Hong Zixuan Peng Jipeng Wang Jiarui Xu

The realization of bionic neural models has great challenges on the biological characteristics and hardware efficiency of neurons. This paper proposes an energy efficient Adaptive Exponential Integrate and Fire (AdEx) neuron based on a novel Area-Efficient Fast COordinate Rotation Digital Computer (AEF-CORDIC). The novel AEF-CORDIC has a higher energy efficiency and shorter latency by reducing the iteration times with negligible hardware overhead. FPGA implementation results show that the proposed AEF-CORDIC based AdEx Neuron has good biological characteristics. Compared with conventional CORDIC based design, our design has 48.4% and 52.5% improvement on energy efficiency and processing speed, respectively.

CORDIC

Realization (probability)

10.1109/icta53157.2021.9661975

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Citations (2)

An Ultra-low Power Relaxation Oscillator with Novel Ultra-low Leakage Switch and Temperature-compensated Resistor

2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) (2020)

Yi Zhan Ao Hu Guoyi Yu Zhenghao Lu Chao Wang

This paper proposes an ultra-low power relaxation oscillator with novel Ultra-Low Leakage Switch (ULLS) and temperature-compensated resistor (TCR). The ULLS decreases the leakage current over 90 dB, and the leakage variation against temperature can be also reduced about ×67. The TCR designed for the oscillator can reach a temperature coefficient of 0.08% ppm/°C. By utilizing resistive frequency locked structure with the proposed ULLS and well-designed TCR, the proposed oscillator achieves higher energy efficiency and better temperature performance than most existing oscillators in literature. It has an ultra-lower power of 87.6 nW (with an ultra-low leakage of 3 nW) when operating at 75.9 kI z and 1.2 V in 0.18-μm, and the simulated temperature sensitivity and supply voltage sensitivity are 23.9 ppm/°C and 0.41%/V, respectively.

Relaxation oscillator

Leakage (economics)

Temperature coefficient

Ultra low power

10.1109/icta50426.2020.9332106

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Optimal clock overlapping of four-phase Dickson charge pump for power efficiency improvement

Kai Yu Xuecheng Zou Guoyi Yu Sizhen Li

This paper presents a compact power efficiency model to be applied in the analysis and design of clock overlapping of four-phase Dickson charge pump. The hands in equations on the optimal clock overlapping are concluded. Based on 0.25um CMOS technology, the proposed model is consistent with the simulation result. Both simulation and model validate the optimal clock overlapping range attains better power efficiency when compare conventional designs.

Optimal design

Clock rate

10.1109/icsict.2008.4734914

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Citations (1)