In this work, we aim to obtain the optimal tradeoff between the average delay and the average power consumption in a communication system. In our system, the arrivals occur at each timeslot according to a Bernoulli arrival process and are buffered at the transmitter. The transmitter determines the scheduling policy of how many packets to transmit under an average power constraint. The power is assumed to be an increasing and convex function of the number of packets transmitted in each timeslot to capture the realism in communication systems. We also consider a finite buffer and allow the scheduling decision to depend on the buffer occupancy. This problem is modelled as a Constrained Markov Decision Process (CMDP). We first prove that the optimal policy of the (Lagrangian) relaxation of the CMDP is deterministic and threshold-based. We then show that the optimal delay-power tradeoff curve is convex and piecewise linear, where each of the vertices are obtained by the optimal solution to the relaxed problem. This allows us to show the optimal policies of the CMDP are threshold-based, and hence can be implemented by a proposed efficient algorithm. The theoretical results and the algorithm are validated by Linear Programming and simulations.
Evolutionary algorithms can outperform conventional placement algorithms such as simulated annealing, analytical placement as well as manual placement on metrics such as runtime, wirelength, pipelining cost, and clock frequency when mapping FPGA hard block intensive designs such as systolic arrays on Xilinx UltraScale+ FPGAs. For certain hard-block intensive, systolic array accelerator designs, the commercial-grade Xilinx Vivado CAD tool is unable to provide a legal routing solution without tedious manual placement constraints. Instead, we formulate an automatic FPGA placement algorithm for these hard blocks as a multi-objective optimization problem that targets wirelength squared and maximum bounding box size metrics. We build an end-to-end placement and routing flow called RapidLayout using the Xilinx RapidWright framework. RapidLayout runs 5-6 times faster than Vivado with manual constraints and eliminates the weeks-long effort to generate placement constraints manually for the hard blocks. We also perform automated post-placement pipelining of the long wires inside each convolution block to target 650 MHz URAM-limited operation. RapidLayout outperforms (1) the simulated annealer in VPR by 33% in runtime, 1.9-2.4 times in wirelength, and 3-4 times in bounding box size, while also (2) beating the analytical placer UTPlaceF by 9.3 times in runtime, 1.8-2.2 times in wirelength, and 2-2.7 times in bounding box size. We employ transfer learning from a base FPGA device to speed-up placement optimization for similar FPGA devices in the UltraScale+ family by 11-14 times than learning the placements from scratch.
Neural networks hold a critical domain in machine learning algorithms because of their self-adaptiveness and state-of-the-art performance. Before the testing (inference) phases in practical use, sophisticated training (learning) phases are required, calling for efficient training methods with higher accuracy and shorter converging time. Many existing studies focus on the training optimization on high-performance servers or computing clusters, e.g. GPU clusters. However, training neural networks on resource-constrained devices, e.g. mobile platforms, is an important research topic barely touched. In this paper, we implement AdaLearner-an adaptive distributed mobile learning system for neural networks that trains a single network with heterogenous mobile resources under the same local network in parallel. To exploit the potential of our system, we adapt neural networks training phase to mobile device-wise resources and fiercely decrease the transmission overhead for better system scalability. On three representative neural network structures trained from two image classification datasets, AdaLearner boosts the training phase significantly. For example, on LeNet, 1.75-3.37× speedup is achieved when increasing the worker nodes from 2 to 8, thanks to the achieved high execution parallelism and excellent scalability.
Low earth orbit (LEO) satellites have the advantages of low transmission delay and wide coverage, which are widely used in current and future satellite communication systems. However, the large-scale and unevenly distributed traffic will easily cause severe inter-satellite-link (ISL) congestion. Therefore, the inter-satellite routing design of the LEO satellite networks is of vital importance. Traditional shortest path-based routing algorithms in LEO networks might cause overlapped loops that aggravate network delay. In this paper, by introducing the deep Q-network (DQN) into routing design, a distributed routing algorithm is proposed to reduce the delay and relieve congestion. Particularly, a reward function, considering routing loop as restriction to identify the best pathways, is designed to prevent the agent from getting stuck in a loop owing to duplicate paths. Meanwhile, instead of simply selecting a fixed shortest path, the proposed DQN model selects the next hop with a certain random probability, which helps to avoid overlapped paths and efficiently relieve congestion. A hybrid OPNET-STK simulation platform is built up for a typical LEO constellation with more than 200 satellites. Simulation results reveal that, compared with the traditional algorithms, the proposed approach can effectively relieve the ISL congestion and brings higher throughput for the LEO networks.
In this paper, we mainly focus on the problem about the channel capacity and power allocation of the downlink process of a wireless two-way relay channel which is time-varying while the relay node has a total awareness of the channel side information. For situations differing about how receiving nodes know about messages for the other, we accordingly determine the channel capacities and the coding process using techniques such as network coding, superposition coding and nested coding; also the relay node should make corresponding strategies about power allocation with channel side information to attain the best average channel capacity, whose optimal solution in closed form is achieved using KKT conditions.
The accelerated convergence of digital and real-world lifestyles has imposed unprecedented demands on today’s wireless network architectures, as it is highly desirable for such architectures to support wireless devices everywhere with high capacity and minimal signaling overhead. Conventional architectures, such as cellular architectures, are not able to satisfy these requirements simultaneously, and are thus no longer suitable for the future era. In this paper, we propose a capacity-centric (C2) architecture for future wireless networking. It is designed based on the principles of maximizing the number of non-overlapping clusters with the average cluster capacity guaranteed to be higher than a certain threshold, and thus provides a flexible way to balance the capacity requirement against the signaling overhead. Our analytical results reveal that C2 has superior generality, wherein both the cellular and the fully coordinated architectures can be viewed as its extreme cases. Simulation results show that the average capacity of C2 is at least three times higher compared to that of the cellular architecture. More importantly, different from the widely adopted conventional wisdom that base-station distributions dominate architecture designs, we find that the C2 architecture is not over-reliant on base-station distributions, and instead the user-side information plays a vital role and cannot be ignored.
With the rapid development of Internet of Things (IoT), massive devices are deployed, which poses severe chal-lenges on access networks due to limited communication re-sources. When massive users contend for access, the information freshness gets worse caused by increasing collisions. It could be fatal for information freshness sensing scenarios, such as remote monitoring systems or self-driving systems, in which information freshness plays a critical part. In this paper, by taking the Age of Information (AoI) as the primary performance indicator, the information freshness using approximate message passing (AMP) based grant-free scheme is investigated and compared with grant-based scheme. Base on the analysis, a user scheduling strategy with sleep threshold and forcing active threshold is proposed to further reduce average AoI (AAoI). Numerical results reveal that the AMP-based grant-free scheme can provide sufficient access capability with less pilot resources, and it is robust to the fluctuation of the number of active users. That ensures that the AMP-based grant-free scheme can keep the AAoI at a low level. It is also shown that the proposed threshold strategy can effectively improve the information freshness.
This study investigated the effects of high-hydrostatic-pressure (HHP) treatment of varying intensity (100-600 MPa) and duration (10-30 min) on polyphenols and volatile aromatic compounds in Marselan red wine. The types and concentrations of polyphenols and volatile aromatic compounds were compared before and after HHP treatment; the results indicated that HHP treatment at 300 MPa for 20 min significantly increased the total polyphenol content to 369.70 mg/L, a rise of 35.82%. The contents of key polyphenols, such as resveratrol and protocatechuic acid, were significantly enhanced. Furthermore, while the total content of volatile aromatic compounds did not change significantly under this condition compared to the untreated samples, the concentration of ester compounds significantly increased to 1.81 times that of the untreated group, thereby enriching the floral and fruity aromas of the wine and effectively improving its aromatic profile and sensory quality. Principal component analysis (PCA) further validated the positive impact of HHP treatment on the flavor characteristics of Marselan red wine. These findings provide technical support for the use of HHP in improving wine quality.
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