Abstract Two‐dimensional contact type fingerprint scanner with a resolution of 300 dpi (84 μm dot pitch) were fabricated for the fingerprint recognition. This sensor array consists of three parts; a sensor thin film transistor (TFT), storage capacitor and switch TFT. High quality of captured fingerprint image was obtained through the a‐Si:H TFT‐array with a high photo to dark current ratio of above 3 order of sensor TFT.
This paper provides a method for evaluating a residual life of water mains using a proportional hazard model(PHM). The survival time of individual pipe is defined as the elapsed time since installation until a break rate of individual pipe exceeds the Threshol Break Rate. A break rate of an individual pipe is estimated by using the General Pipe Break Model(GPBM). In order to use the GPBM effectively, improvement of the GPBM is presented in this paper by utilizing additional break data that is the cumulative number of pipe break of 0 for the time of installation and adjusting a value of weighting factor(WF). The residual lives and hazard ratios of the case study pipes of which the cumulative number of pipe breaks is more than one is estimated by using the estimated survival function. It is found that the average residual lives of the steel and cast iron pipes are about 25.1 and 21 years, respectively. The hazard rate of the cast iron pipes is found to be higher than the steel pipes until 20 years since installation. However, the hazard rate of the cast iron pipes become lower than the hazard rates of the steel pipes after 20 years since installation.
The threshold voltage (Vth) shift of hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) have been investigated for the atmospheric pressure chemical vapor deposition (APCVD) silicon dioxide (SiO2) gate insulator. For both positive and negative gate bias stress, the threshold voltage was shifted in the positive direction and was dominated by the defect creation near the a-Si:H/SiO2 interface. There was little charge trapping into the APCVD SiO2 gate insulator under the gate bias stress. For the positive gate bias stress, the threshold voltage shifts of a-Si:H TFTs with the a-Si:H/SiO2 interface were smaller than those of the conventional a-Si:H TFTs with the a-Si:H/SiNx interface.
We studied the performance improvement of hydrogenated amorphous silicon (a-Si:H) thin-film transistor (TFT) using atmospheric pressure chemical vapor deposition (APCVD) SiO2 as a gate insulator. The threshold voltage and the subthreshold swing decrease remarkably by N2 plasma treatment on the APCVD SiO2 surface even though the field effect mobility changes little, indicating that the interface state density around the Fermi level is reduced significantly by N2 plasma treatment. We obtained the high performance a-Si:H TFT with the field effect mobility of 1.25 cm2/V s, the threshold voltage of 3.5 V and the subthreshold swing of 0.45 V/dec.
SUH, Sunduck D.; YANG, Keun-Yul; LEE, Jae-Hoon; AHN, Byung-Min; KIM, Jeong Hyun.2015.Effects of Korean Train Express(KTX) operation on the national transport system,Article,[Tokyo]Eastern Asia Society for Transportation Studies,15