S.Y.-M. Choi

Singapore Institute of Manufacturing Technology

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T. C. Ang

Semiconductor Manufacturing International (China)

W.H. Lin

National University of Singapore

C. H. Ang

Sengkang General Hospital

Min Zhou

Chinese Research Academy of Environmental Sciences

K. L. Pey

Singapore University of Technology and Design

Zhen‐Chao Dong

Hefei National Center for Physical Sciences at Nanoscale

J.H. Ye

Institute of Materials Research and Engineering

W.S. Lau

University of Science and Technology Beijing

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Nanyang Technological University

National University of Singapore

Singapore Institute of Manufacturing Technology

Zhejiang University

Institute of Microelectronics

Institute of Materials Research and Engineering

Semiconductor Manufacturing International (China)

Woodlands Health Campus

Sengkang General Hospital

Singapore General Hospital

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Effects of post-deposition anneal on the electrical properties of Si₃N₄ gate dielectric

IEEE Electron Device Letters (2002)

W.H. Lin K. L. Pey Zhen‐Chao Dong S.Y.-M. Choi Min Zhou

The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si ₃ N ₄ films were in situ annealed in either H ₂ (2%)/O ₂ at 950/spl deg/C or N ₂ O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si ₃ N ₄ /Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H ₂ (2%)/O ₂ anneal exhibit a lower gate leakage current and improved reliability compared to that of N ₂ O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si ₃ N ₄ film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 μm n-MOSFET device.

10.1109/55.988812

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