We have developed a 3.3 kV/450 A Full-SiC nHPD(exp 2) (next High Power Density Dual) module. An extremely low internal package inductance can make the best use of Full-SiC. Demonstration of fast and smooth switching characteristics of the module culminate in a total switching loss one fourth of a direct Si-IGBT equivalent. Superior output characteristics of the Full-SiC module under traction inverter simulation are presented. For accurate calculation, features of reverse conduction characteristics of the Full-SiC nHPD(exp 2) are considered.
Novel chemical mechanical polishing (CMP) process using a fixed abrasive tool (FX-tool), which is a kind of grindstone, was developed for dielectric planarization. In order to obtain flat surface for 45-nm-node of semiconductor generation, two points that are adopting stiff polishing pad/tool and reducing concentration of free-abrasives become critical issues. Newly developed FX-tool has more than ten times higher Young's modulus than that of a conventional CMP pad, and simultaneously, concentration of free abrasives on its surface can be controlled by polishing time. In experiments using several test-wafers, less than 30nm of dishing was obtained up to 3mm-length-pattern. Additionally, polyacrylic ammonium (PAA) effectively affects to increase degree of selectivity between oxide and nitride for shallow trench isolation (STI) process. The selectivity of 41 was obtained at 3 vol.% concentration of PAA. STI test wafers were successfully polished without any additional processes such as etching back.
A 3.3-kV SiC-Si hybrid module, composed of a low-forward-voltage ( V F ) SiC junction-barrier-Schottky (JBS) diode and a low-saturation-voltage V CE(sat) Si trench IGBT was fabricated and demonstrated highly efficient operation.
Higher maximum junction temperature operation requires higher power cycling reliability especially for silicon carbide power modules. In this work, with the help of a novel sintered copper die attach technology, 3.3kV/450A full-SiC power modules for up to 175°C maximum junction temperature were developed. Demonstrated power cycling lifetime shows an improvement of six times conventional Pb-rich solder die attach modules.
To achieve higher power density and higher temperature operation, a 3.3 kV/1000 A full-SiC power module with novel sintered copper die attach technology for Tj,max=175deg C operation was developed. The power density reached 47 kVA/cm2, which is equivalent to 25 % increase compared to previous work as the world's highest (published) power density high voltage power module. The module consisted of SiC-MOSFETs without SiC-SBDs. The diode-less feature and sintered copper die attach technology enabled such a higher power density. Thermal resistance measurement in the form of structure functions showed that thermal resistance of the sintered copper layer was reduced to one third of the solder layer. To demonstrate reliability for 1000 A and 175deg C operation, a power cycling test, high temperature reverse bias test and high temperature high humidity reverse bias test were conducted. Static electrical characteristics, as well as switching waveforms and SOA were validated by testing.
Low conduction and switching loss silicon carbide power modules must be operated at higher maximum junction temperatures utilizing their wide bandgap material properties. This leads to wider temperature range operation and requires higher power cycling reliability. However, silicon carbide power modules showed inferior power cycling test results compared with conventional silicon power modules due to the hard material property of silicon carbide. We have solved this issue by replacing the conventional solder die attach with a new copper sintering die attach. This work developed a sintered copper die attach technology for 175 °C maximum junction temperature operation of 3.3 kV 450 A Full-SiC power modules. Sintered copper die attach changed the failure mode of the power cycling test from the die attach layer crack propagation to lift off of the bond wires on the top electrode. The power cycling test showed an improvement of six times the lifetime compared to the conventional lead-rich solder die attached to SiC modules.
Lateral charge distribution in nitride of split-gate type Semiconductor-Oxide-Nitride-Oxide-Semiconductor (SONOS) memories has been determined by well-controlled experimental devices in which nanometer-size nitride piece was located at various positions for monitoring trapped charge. We found that electron distribution is created by two different hot-electron-injection mechanisms. Based on this new finding, the way to improve the matching of electron and hole distributions is investigated.
We investigated properties of a differential read-head focusing on resolution, output signal, and bit error rate (BER) through experiments and calculations. We successfully observed particular waveforms of the differential head. The fabricated differential heads showed much higher resolution and better BER than conventional heads. Through measurements and calculations, we clarified that as gap-length (GL) between two spin-valves decreases, the resolution for the differential head increases, but the output signal decreases. Accordingly, the differential head has optimal GL to achieve the best BER. The optimal GL is almost the same as the shortest bit length. We also clarified that a calculated differential head with optimized GL has better BER than a conventional head with a shield-gap length of 20 nm, especially at higher linear density. Therefore, the differential head is one of the candidates for reader structures for high-areal-density hard disk drives.
A 3.3 kV/800 A diode-less (D-less) SiC power module has been developed adopting the next High Power Density Dual (nHPD(exp 2)) package. The ultra-high power density value of 37.7 kVA/cm(exp 2) is realized by fulfilment with only SiC-MOSFETs. Furthermore, as a countermeasure for bipolar degradation issues related to body diodes in the SiC-MOSFET structure, a high throughput screening process is deployed. The low loss and high reliability characteristics of the D-less SiC module are set out herein.
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