H. Tan

Shanghai Jiao Tong University

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Co-Authors

P.K. Tan

GlobalFoundries (Singapore)

Zhihong Mai

Xi'an Jiaotong University

Jeffrey Lam

University of California, San Diego

M. K. Dawood

GlobalFoundries (Singapore)

H.H. Yap

GlobalFoundries (United States)

Rong He

Yiwu Science and Technology Research Institute

G.R. Low

GlobalFoundries (Singapore)

Huanhuan Feng

Harbin Institute of Technology

Ting Hui Ng

National University of Singapore

Youda Huang

Guangzhou Electronic Technology (China)

Cooperative Institutions

GlobalFoundries (Singapore)

National University of Singapore

GlobalFoundries (United States)

Chinese Academy of Sciences

Nanyang Technological University

Agency for Science, Technology and Research

Institute of Materials Research and Engineering

Shanghai Jiao Tong University

Singapore Institute of Manufacturing Technology

University of Chinese Academy of Sciences

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Application of conductive atomic force microscopy to study the in-line electrical defects

S.L. Toh Qiyun Deng Wenjia Tang V. Lim F.H. Gn

Selection of optimized electron beam parameters for in-line monitoring is necessary to eliminate false signals. Application of electron beam to detect electrical defects, particularly leakages, for static random access memory (SRAM) cells poses a great challenge as it requires current measurement tool with nanometer resolution to complement it. By correlating the brightness intensity or the gray-level value to the measured current values, we have shown that conductive atomic force microscopy (C-AFM) can overcome this obstacle and can be used to verify the validity of the voltage contrast (VC) captured by HMI eScan3xx Ebeam inspection tool.

Nanometre

10.1109/ipfa.2008.4588173

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Citations (3)

A sample preparation methodology to reduce sample edge unevenness and improve efficiency in delayering the 20-nm node IC chips

Huanhuan Feng P.K. Tan H.H. Yap G.R. Low Rong He

With continuous scaling of Complementary Metal Oxide Semicondutor (CMOS) device dimensions, traditional inter-level dielectrics have be replaced by low-k materials, because of the advantages of ultra low-k material such as lower parasitic capacitance, lower cross talk effects, and lower RC delay. The new material in integrated circuits (IC) makes physical failure analysis (PFA) more challenging. This paper presents a sample preparation methodology for reducing the sample deprocess edging effect with an efficient way on delayering the 20-nm node IC chips. We combined several delayering techniques to achieve an excellent flatness surface and improve the time efficiency for PFA on 20nm technology.

Flatness (cosmology)

Sample (material)

Parasitic capacitance

10.1109/ipfa.2015.7224432

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Citations (5)

Top-Down Delayering with Planar Slicing Focus Ion Beam (TD-PS-XFIB)

Proceedings - International Symposium for Testing and Failure Analysis (2013)

G.R. Low P.K. Tan Ting Hui Ng H.H. Yap Huanhuan Feng

Abstract Top-down, layer-by-layer de-layering inspection with a mechanical polisher and serial cross-sectional Focused Ion Beam (XFIB) slicing are two common approaches for physical failure analysis (PFA). This paper uses XFIB to perform top-down, layer-by-layer de-layering followed by Scanning Electron Microscope (SEM) inspection. The advantage of the FIB-SEM de-layering technique over mechanical de-layering is better control of the de-layering process. Combining the precise milling capability of the FIB with the real-time imaging capability of the SEM enables the operator to observe the de-layering as it progresses, minimizing the likelihood of removing either too much or too little material. Furthermore, real time SEM view during top-down XFIB de-layering is able to provide a better understanding of how the defects are formed and these findings could then be feedback to the production line for process improvement.

Layering

10.31399/asm.cp.istfa2013p0569

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Citations (1)

Utilizing Nanoprobing and Circuit Diagnostics to Identify Key Failure Mechanism of Otherwise Nonvisible Defects in 20 nm Logic Devices

Proceedings - International Symposium for Testing and Failure Analysis (2014)

M. K. Dawood Chen Chen P.K. Tan S. James P.S. Limin

Abstract In this work, we present two case studies on the utilization of advanced nanoprobing on 20nm logic devices at contact layer to identify the root cause of scan logic failures. In both cases, conventional failure analysis followed by inspection of passive voltage contrast (PVC) failed to identify any abnormality in the devices. Technology advancement makes identifying failure mechanisms increasingly more challenging using conventional methods of physical failure analysis (PFA). Almost all PFA cases for 20nm technology node devices and beyond require Transmission Electron Microscopy (TEM) analysis. Before TEM analysis can be performed, fault isolation is required to correctly determine the precise failing location. Isolated transistor probing was performed on the suspected logic NMOS and PMOS transistors to identify the failing transistors for TEM analysis. In this paper, nanoprobing was used to isolate the failing transistor of a logic cell. Nanoprobing revealed anomalies between the drain and bulk junction which was found to be due to contact gouging of different severities.

10.31399/asm.cp.istfa2014p0196

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Citations (0)

Surface Treatment for 20 nm SRAM Devices to Overcome Tip Curvature Radius Limitation in Conductive AFM Analysis

Proceedings - International Symposium for Testing and Failure Analysis (2013)

Tsu Hau Ng S. James M. K. Dawood P.S. Limin H. Tan

Abstract Conductive-Atomic Force Microscopy (C-AFM) is a popular failure analysis method used for localization of failures in Static Random Access Memory (SRAM) devices [1-4]. The SRAM structure has a highly repetitive pattern where any abnormality in a failed cell compared to neighboring cells could be easily identified from its current image [5-7]. Unlike topographical imaging, the C-AFM requires the probe tip to be coated with a conductive layer in order to pick up the electrical signals from the device under test. The coating needs to be sufficiently thick as it would wear off after a certain amount of physical scanning. This additional coating on the AFM tip is essential but poses a limit to the tip radius curvature. The commercially available tip radius is approximately 35nm (DDESP-10 from Bruker) and the dimension is too large for imaging of 20nm technology device. However, the limitation could be alleviated by subjecting the sample surface to treatment prior to C-AFM imaging. The aim of this surface treatment is to ensure C-AFM tip maintains sufficient scanning contact with the tiny conductive (tungsten) structure of the sample in order to achieve distinct current image. The surface treatment is done by creating a receding Inter-Layer Dielectric (ILD) from its neighboring tungsten contact. The creation of the receding depth could be achieved by either wet etching or dry etching (Reactive Ion Etching, RIE). In this work, the surface treatments by these two methods have been investigated and the recipe is optimized to obtain a clear current image. The optimized recipe is then applied on actual failure analysis where three cases are studied.

Radius of curvature

Dry etching

10.31399/asm.cp.istfa2013p0511

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Co dependence of Curie temperature in amorphous Fe–Co–Zr–B–Nb alloys with high glass-forming ability

Journal of Physics Condensed Matter (2004)

Bin Yao Yong‐Wei Zhang Lei Si H. Tan Y Li

Effects of Co substitution for Fe on the Curie temperature (Tc), glass-forming ability (GFA) and thermal stability of amorphous Fe61−xCoxZr5B30Nb4 (FCZBN) alloys were studied for Co content ranging from 0 to 15 at. %. The Tc shows a sinusoid-like behaviour with increasing Co content, revealing two maxima at 3 and 12.5 at. % Co and a minimum at 7.5 at. % Co. Co content dependences of glass transition (Tg), crystallization (Tx) and reduced glass transition temperatures (Trg) of the amorphous alloys are almost completely opposite to that of the Tc. The Tc decreases with increasing Tg and Trg, but increases with increasing Co content. The Co content dependence of the Tc is suggested to relate to both Co content and high GFA of the amorphous alloys.

Thermal Stability

Content (measure theory)

10.1088/0953-8984/16/34/029

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Citations (6)

Parameters governing glass formation: A view from phase selection

Materials Science and Engineering A (2006)

H. Tan Y. Li

10.1016/j.msea.2006.02.330

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Citations (2)

Application of Laser Deprocessing Techniques in Physical Failure Analysis

Proceedings - International Symposium for Testing and Failure Analysis (2013)

H.H. Yap P.K. Tan Jeffrey Lam Ting Hui Ng G.R. Low

Abstract With the scaling of semiconductor devices to nanometer range, ensuring surface uniformity over a large area while performing top down physical delayering has become a greater challenge. In this paper, the application of laser deprocessing technique (LDT) to achieve better surface uniformity as well as for fast deprocessing of sample for defect identification in nanoscale devices are discussed. The proposed laser deprocess technique is a cost-effective and quick way to deprocess sample for defect identification and Transmission Electron Microscopy (TEM) analysis.

Nanometre

Sample (material)

Identification

10.31399/asm.cp.istfa2013p0563

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Citations (7)

AES analysis of nitridation of Si(100) by 2–10 keV N+2 ion beams

Applied Surface Science (1997)

J. S. Pan Andrew T. S. Wee C. H. A. Huan H. Tan K.L. Tan

10.1016/s0169-4332(97)80200-0

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Citations (14)