<p>Synchronous generators require certain protection against loss of excitation because it can lead to harmful effect to a generator and main grid. Systems of powers are evolving with applications of new techniques to increase reliability and security, at the meantime techniques upgradation is being existed to save financial cost of a different component of power system, which affect protection ways this report discuss the way of loss of excitation protection scheme for an increase in a synchronous generator. It is obvious that when direct axis synchronous reactance has a high value, the coordination among loss of excitation protection and excitation control is not effective. This lead to restricting absorption capability of the reactive power generator. This report also reviews the suitable philosophy for setting the limiters of excitation and discusses its effect on loss of excitation protection and system performance. A protection scheme is developed to allow for utilization of machine capability and power swing blocking is developed to increase the reliability when power swing is stable.</p><p><em> </em></p>
This paper presents a modular multilevel DC-DC boost converter for high voltage gain achievement with reduction of current and voltage stresses. Normally, conventional DC-DC boost converter (CDBC) has low voltage gain capability, higher current and voltage stresses which lead to high conduction loss of the semiconductor devices due to the circuit structure limitation. Therefore, 4-level synchronous modular multilevel DC-DC converter (SMMC) with Marx topology adaptation is considered to improve the limitation circuit structure of CDBC. Besides, the 4-level SMMC have high voltage gain achievement, it also has lower current and voltage stresses features. A 145 W and 48 V input voltage of 4-level SMMC has been designed and experimentally verified where the result is compared with CDBC. The results show that the CDBC required 0.76 of duty cycle while 4-level SMMC only require 0.5 duty cycle to achieve 200 V output voltage, respectively. Additionally, the current stress decreases by 75% on input inductor and 50% reduction from voltage stress of switching as compared to the CDBC. Consequently, the selection rating for the components can be decreased and higher efficiency can be obtained for the 4-level SMMC as compared to the CDBC.
This paper presents an improved two-switch bridgeless PFC SEPIC (TSBPFC SEPIC) structure for reducing current total harmonic distortion (THD) and minimize circulating current. A conventional PFC SEPIC structure which has an integration between SEPIC and full-bridge rectifier possess some problems high current THDi output voltage ripple and a low PF. The existing bridgeless PFC SEPIC structure has two input inductors (L1 and L2) that causes circulating current and thus producing high current THDi at input source. In order to improve the existing structure of bridgeless PFC SEPIC, the proposed converter an additional capacitor is connected in parallel of input diode. In addition, comparisons between two converter which are existing bridgeless PFC SEPIC and Improved TSBPFC SEPIC structure are discussed. The prototype with specification of 100 W and 48 V dc output voltage is developed. The results show THDi of 0.99% and power factor of 0.98 are achieved with 50 kHz switching frequency.
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