In this paper, the reliability of SiC MOSFETs under repetitive short-circuit conditions is investigated. At first, the maximum short-circuit withstanding time is studied at three different case temperatures and the critical energy is identified in each case. Thereafter, the repetitive short-circuit tests are performed with fixed pulse time duration and bias voltage. The increasing gate leakage current measured at the interval of repetitive short-circuit tests is observed and the gate oxide failure is confirmed. Then, the results of repetitive short-circuit tests with respect to different case temperatures are presented, which helps to find a correlation between the number of repetitions to failure and the initial case temperature. The impact of repetitive short-circuit tests on the bond wire resistance is also analyzed.
Being the power loss and temperature distribution in power-electronics semiconductor dies influenced by one another, this paper demonstrates that neglecting such an effect can result in significant errors in electro-thermal simulations and mistaken calculation of junction temperatures.Two case studies on different semiconductor technologies, namely Silicon Insulated-Gate Bipolar Transistors (IGBTs) and Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), are presented to corroborate the paper findings.Resultant temperature distributions are obtained by a proposed flowchart, which accepts the corresponding power dissipation input from MATLAB environment and employs a finite element based analysis implemented in COMSOL Multiphysics environment.
The aim of this work is to present a PSpice implementation for a well-established and compact physics-based SiC MOSFET model, including a fast, experimental-based parameter extraction procedure in a MATLAB GUI environment. The model, originally meant for single-die devices, has been used to simulate the performance of high current rating (above 100 A), multi-chip SiC MOSFET modules both for static and switching behavior. Therefore, the simulation results have been validated experimentally in a wide range of operating conditions, including high temperatures, gate resistance and stray elements. The whole process has been repeated for three different modules with voltage rating of 1.2 kV and 1.7 kV, manufactured by three different companies. Lastly, a parallel connection of two modules of the same type has been performed in order to observe the unbalancing and mismatches experimentally, and to verify the model effectiveness in such challenging topologies.
Nanometer-scale imaging of magnetization and current density is the key to deciphering the mechanisms behind a variety of new and poorly understood condensed matter phenomena. The recently discovered correlated states hosted in atomically layered materials such as twisted bilayer graphene or van der Waals heterostructures are noteworthy examples. Manifestations of these states range from superconductivity, to highly insulating states, to magnetism. Their fragility and susceptibility to spatial inhomogeneities limits their macroscopic manifestation and complicates conventional transport or magnetization measurements, which integrate over an entire sample. In contrast, techniques for imaging weak magnetic field patterns with high spatial resolution overcome inhomogeneity by measuring the local fields produced by magnetization and current density. Already, such imaging techniques have shown the vulnerability of correlated states in twisted bilayer graphene to twist-angle disorder and revealed the complex current flows in quantum Hall edge states. Here, we review the state-of-the-art techniques most amenable to the investigation of such systems, because they combine the highest magnetic field sensitivity with the highest spatial resolution and are minimally invasive: magnetic force microscopy, scanning superconducting quantum interference device microscopy, and scanning nitrogen-vacancy center microscopy. We compare the capabilities of these techniques, their required operating conditions, and assess their suitability to different types of source contrast, in particular magnetization and current density. Finally, we focus on the prospects for improving each technique and speculate on its potential impact, especially in the rapidly growing field of two-dimensional (2D) materials.
A compact electro-thermal SiC Power MOSFET model implemented in LTSpice is presented in this paper. A 1200 V, 90A CREE SiC power MOSFET (C2M0025120D) has been used in this work to illustrate the parameter extraction and experimental model validation. The dynamic validation has been shown using a double-pulse test circuit. The convergence has been tested with the 4-switch topology of an inverter and a comparison between MAST, Verilog-A and CREE's empirical model of the same device has also been presented.
In this paper, a purposely-imbalanced current density distribution in insulated-gate bipolar transistor (IGBT) chips is introduced to reduce the surface temperature inhomogeneity of standard chips technology. The idea is implemented by modifying the gate threshold voltage across the active chip area, to counteract the uneven temperature distribution of a standard IGBT chip. Coupled thermomechanical analysis realized by finite element method (FEM) is used for validating the engineered IGBT chip via comparing different layouts.
