Ernesto Wandeler

ETH Zurich

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Co-Authors

Lothar Thiele

ETH Zurich

A. Maxiaguine

ETH Zurich

Samarjit Chakraborty

University of North Carolina Health Care

Paul Lieverse

Siemens (Netherlands)

Marcel Verhoef

European Space Research and Technology Centre

Rolf Ernst

Technische Universität Braunschweig

Arne Hamann

Universität Innsbruck

Michael González Harbour

Universidad de Cantabria

Nikolay Stoimenov

ETH Zurich

Rafik Henia

Thales (France)

Cooperative Institutions

ETH Zurich

Technische Universität Braunschweig

École Polytechnique Fédérale de Lausanne

Board of the Swiss Federal Institutes of Technology

University of California, Berkeley

Technical University of Munich

Robotic Technology (United States)

National University of Singapore

Politecnico di Milano

Carnegie Mellon University

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Optimal TDMA time slot and cycle length allocation for hard real-time systems

Ernesto Wandeler Lothar Thiele

We present an analytic method to determine the provably smallest possible slot length that must be allocated in a TDMA resource, to serve an event-triggered hard real-time load with arbitrary deterministic timing behavior. Based on this method, we then present constructive methods to find all feasible as well as the optimal cycle length in a TDMA resource, and we show how to determine the minimum required band-width of a TDMA resource. We demonstrate the applicability and computational efficiency of the presented methods in a case study of a large distributed embedded system with a TDMA bus, where we will find the optimal parameter set for the TDMA bus.

Constructive

10.1145/1118299.1118417

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Citations (66)

Optimal TDMA time slot and cycle length allocation for hard real-time systems

Asia and South Pacific Conference on Design Automation, 2006. (2006)

Ernesto Wandeler Lothar Thiele

We present an analytic method to determine the provably smallest possible slot length that must be allocated in a TDMA resource, to serve an event-triggered hard real-time load with arbitrary deterministic timing behavior. Based on this method, we then present constructive methods to find all feasible as well as the optimal cycle length in a TDMA resource, and we show how to determine the minimum required bandwidth of a TDMA resource. We demonstrate the applicability and computational efficiency of the presented methods in a case study of a large distributed embedded system with a TDMA bus, where we find the optimal parameter set for the TDMA bus

Constructive

10.1109/aspdac.2006.1594731

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Citations (24)

Performance Analysis of Distributed Embedded Systems

Industrial information technology series (2009)

Ernesto Wandeler Wolfgang Haid Lothar Thiele

10.1201/9781439807637.ch10

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Citations (13)

Influence of different abstractions on the performance analysis of distributed hard real-time systems

Design Automation for Embedded Systems (2008)

Simon Perathoner Ernesto Wandeler Lothar Thiele Arne Hamann Simon Schliecker

Abstraction

Static timing analysis

10.1007/s10617-008-9015-1

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Citations (45)

Quantitative characterization of event streams in analysis of hard real-time applications

Ernesto Wandeler A. Maxiaguine Lothar Thiele

Many real-time embedded systems process event streams which are composed of a finite number of different event types. Each different event type on the stream would typically impose a different workload to the system, and thus the knowledge of possible correlations and dependencies between the different event types could be exploited to get tighter analytic performance estimations of the complete system. We propose an abstract stream model to characterize such an event stream. The model captures the needed information of all possible traces of a class of event streams and can hence be used to obtain hard bounded worst-case and best-case estimations of a system. We show how the proposed abstract stream model can be obtained from a concrete stream specification, and how it can be used for performance analysis. The applicability of our approach and its advantages over traditional worst-case performance analysis are shown in a case study of a multimedia application.

10.1109/rttas.2004.1317292

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Citations (26)

On the use of greedy shapers in real-time embedded systems

ACM Transactions on Embedded Computing Systems (2012)

Ernesto Wandeler A. Maxiaguine Lothar Thiele

Traffic shaping is a well-known technique in the area of networking and is proven to reduce global buffer requirements and end-to-end delays in networked systems. Due to these properties, shapers also play an increasingly important role in the design of multiprocessor embedded systems that exhibit a considerable amount of on-chip traffic. Despite the growing importance of traffic shapping in this area, no methods exist for analyzing shapers in distributed embedded systems and for incorporating them into a system-level performance analysis. Until now it was not possible to determine the effect of shapers on end-to-end delay guarantees or buffer requirements in such systems. In this work, we present a method for analyzing greedy shapers, and we embed this analysis method into a well-established modular performance analysis framework for real-time embedded systems. The presented approach enables system-level performance analysis of complete systems with greedy shapers, and we prove its applicability by analyzing three case study systems.

10.1145/2146417.2146418

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Citations (90)

Influence of different system abstractions on the performance analysis of distributed real-time systems

Simon Perathoner Ernesto Wandeler Lothar Thiele Arne Hamann Simon Schliecker

System level performance analysis plays a fundamental role in the design process of real-time embedded systems. Several different approaches have been presented so far to address the problem of accurate performance analysis of distributed embedded systems in early design stages. The existing formal analysis methods are based on essentially different concepts of abstraction. However, the influence of these different models on the accuracy of the system analysis is widely unknown, as a direct comparison of performance analysis methods has not been considered so far. We define a set of benchmarks aimed at the evaluation of performance analysis techniques for distributed systems. We apply different analysis methods to the benchmarks and compare the results obtained in terms of accuracy and analysis times, highlighting the specific effects of the various abstractions. We also point out several pitfalls for the analysis accuracy of single approaches and investigate the reasons for pessimistic performance predictions.

Abstraction

Static timing analysis

Systems analysis

10.1145/1289927.1289959

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Citations (59)

Real-time interfaces for composing real-time systems

Lothar Thiele Ernesto Wandeler Nikolay Stoimenov

Recently, a number of frameworks were proposed to extend interface theory to the domains of single-processor and distributed real-time systems. This paper unifies some of these approaches and proves properties like refinement and independent implementability. We also explicitly state the requirements to a framework for these properties to be fulfilled. Further, a new notion of adaptive interfaces is introduced that supports the design by providing mechanisms for propagating system constraints, such as (end-to-end) delays, available computing and communication resources, buffer spaces, and energy. Guarantees and assumptions on interfaces are not any longer static but adapt according to the system environment. This can be used to answer synthesis questions at design time or to adapt system parameters to changing environment requirements at run-time. The applicability of the presented framework is proven by adapting it to a number of different real-time analysis models.

Interface (matter)

10.1145/1176887.1176894

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Citations (93)

Interface-Based Rate Analysis of Embedded Systems

Samarjit Chakraborty Yanhong Liu Nikolay Stoimenov Lothar Thiele Ernesto Wandeler

Interface-based design is now considered to be one of the keys to tackling the increasing complexity of modern embedded systems. The central idea is that different components comprising such systems can be developed independently and a system designer can connect them together only if their interfaces match, without knowing the details of their internals. We use the concept of rate interfaces for compositional (correct-by-construction) design of embedded systems whose components communicate through data streams. Using the associated rate interface algebra, two components can be connected together if the output rate of one component is "compatible" with the input rate of the other component. We formalize this notion of compatibility and show that such an algebra is non-trivial because it has to accurately model the burstiness in the arrival rates of such data streams and the variability in their processing requirements. We discuss how rate interfaces simplify compositional design and at the same time help in functional and performance verification which would be difficult to address otherwise. Finally, we illustrate these advantages through a realistic case study involving a component-based design of a multiprocessor architecture running a picture-in-picture application

Burstiness

Component (thermodynamics)

Interface (matter)

10.1109/rtss.2006.26

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Citations (34)

Abstracting functionality for modular performance analysis of hard real-time systems

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. (2005)

Ernesto Wandeler Lothar Thiele

System level performance analysis techniques play an important role in the design process of complex embedded systems. They allow analyzing essential characteristics of a system design in an early design stage and supporting therewith the choice of important design decisions. While analytical methods for system level performance analysis lead to hard bounded analysis results, the obtained results are often overly pessimistic due to a lack of details such analytical methods can incorporate in their system analysis. To overcome this problem, we present new abstract models for event streams and system components of embedded systems, and show how these models can be combined to modules for modular performance analysis. With the presented models, we can capture complex functional properties of systems, as for example caches, variable resource demand of events in an event stream, or arbitrary up- and down-sampling of event streams in a system component. The applicability of our models and their advantages over traditional models for performance analysis are shown in a case study of a system component with LRU (least recently used) cache.

Component (thermodynamics)

Discrete-Event Simulation

Static timing analysis

10.1109/aspdac.2005.1466429

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Citations (5)