Subhranu Samanta

Centurion University of Technology and Management

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Kaizhen Han

National University of Singapore

Xiao Gong

National University of Singapore

S. Maikap

Chang Gung University

Chen Sun

National University of Singapore

Jian‐Tai Qiu

Taipei Medical University Hospital

Chengkuan Wang

National University of Singapore

Haiwen Xu

University of California, San Diego

Qiwen Kong

National University of Singapore

Yao Zhu

Institute of Microelectronics

Debanjan Jana

Chang Gung University

Cooperative Institutions

National University of Singapore

Agency for Science, Technology and Research

Institute of Microelectronics

Chang Gung University

Nanjing University of Posts and Telecommunications

Chinese Academy of Sciences

Nanyang Technological University

Indian Institute of Technology Kharagpur

Institute of Materials Research and Engineering

National Yang Ming Chiao Tung University

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Computational Associative Memory with Amorphous InGaZnO Channel 3D NAND-Compatible FG Transistors

arXiv (Cornell University) (2021)

Chen Sun Chao Li Subhranu Samanta Kaizhen Han Zijie Zheng

3D NAND enables continuous NAND density and cost scaling beyond conventional 2D NAND. However, its poly-Si channel suffers from low mobility, large device variations, and instability caused by grain boundaries. Here, we overcome these drawbacks by introducing an amorphous indium-gallium-zinc-oxide (a-IGZO) channel, which has the advantages of ultra-low OFF current, back-end-of-line compatibility, higher mobility and better uniformity than poly-Si, and free of grain boundaries due to the amorphous nature. Ultra-scaled floating-gate (FG) transistors with a channel length of 60 nm are reported, achieving the highest ON current of 127 uA/um among all reported a-IGZO-based flash devices for high-density, low-power, and high-performance 3D NAND applications. Furthermore, a non-volatile and area-efficient ternary content-addressable memory (TCAM) with only two a-IGZO FG transistors is experimentally demonstrated. Array-level simulations using experimentally calibrated models show that this design achieves at least 240x array-size scalability and 2.7-fold reduction in search energy than 16T-CMOS, 2T2R, and 2FeFET TCAMs.

10.48550/arxiv.2112.07992

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Enhancement of memory window in short channel non-volatile memory devices using double layer tungsten nanocrystals

Subhranu Samanta Pawan Kumar Singh Won Jong Yoo Ganesh Samudra Yee‐Chia Yeo

This paper for the first time, reports the memory enhancement characteristics and good retention with feasibility of two-bit operation of small scale devices with gate length down to 100 nm, using double layer W nanocrystals embedded in HfAlO for the next generation memory application. Double layer device shows increasing memory window with scaling which will be extremely beneficial

Non-Volatile Memory

Double layer (biology)

10.1109/iedm.2005.1609297

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Citations (30)

Self-compliance-improved resistive switching using Ir/TaO x /W cross-point memory

Nanoscale Research Letters (2013)

Amit Prakash Debanjan Jana Subhranu Samanta S. Maikap

Abstract Resistive switching properties of a self-compliance resistive random access memory device in cross-point architecture with a simple stack structure of Ir/TaO x /W have been investigated. A transmission electron microscope and atomic force microscope were used to observe the film properties and morphology of the stack. The device has shown excellent switching cycle uniformity with a small operation of ±2.5 V and a resistance ratio of >100. The device requires neither any frorming-process nor current compliance limit for repeatable operation in contrast to conventional resistive random access memory devices. The effect of bottom electrode morphology and surface roughness is also studied. The improvement is due to the enhanced electric field at the nanotips in the bottom electrode and the defective TaO x switching layer which enable controlled filament formation/rupture. The device area dependence of the low resistance state indicates multifilament formation. The device has shown a robust alternating current endurance of >10 5 cycles and a data retention of >10 4 s.

Nanochemistry

10.1186/1556-276x-8-527

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Evolution of complementary resistive switching characteristics using IrOx/GdOx/Al2O3/TiN structure

Applied Physics Letters (2016)

Debanjan Jana Subhranu Samanta S. Maikap Hsin-Ming Cheng

The complementary resistive switching (CRS) characteristics using an IrOx/GdOx/Al2O3/TiN single cell are observed whereas the bipolar resistive switching (BRS) characteristics are observed for the IrOx/GdOx/TiN structure. Transmission electron microscope and energy dispersive X-ray spectroscopy depth profile show crystalline GdOx film and the presence of higher amount of oxygen at both IrOx/GdOx interface and Al2O3 layer. Inserting thin Al2O3 layer, the BRS is changed to CRS. This CRS has hopping distance of 0.58 nm and Poole-Frenkel current conductions for the “0” and “1” states, respectively. A schematic model using oxygen vacancy filament formation/rupture at the TE/GdOx interface and Al2O3 layer has been illustrated. This CRS device has good endurance of 1000 cycles with a pulse width of 1 μs, which is very useful for future crossbar architecture.

10.1063/1.4939682

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TEM Study on the Evolution of Ge Nanocrystals in Si Oxide Matrix as a Function of Ge Concentration and the Si Reduction Process

Han Guan Chew Wee Kiong Choi Y. L. Foo W. K. Chim Eugene A. Fitzgerald

Growth and evolution of germanium (Ge) nanocrystals embedded into a silicon oxide (SiO2) system have been studied based on the Ge content of co-sputtered Ge-SiO2 films using transmission electron microscopy (TEM) and Xray photoelectron spectroscopy (XPS). It was found that when the proportion of Ge relative to Ge oxide is 20%, TEM showed that annealing the samples at 800C for 60 min resulted in the formation of a denuded region between the silicon/silicon oxide (Si/SiO2) interface and a band of Ge nanocrystals towards the surface of the film. By introducing a 20-nm thick thermal oxide barrier on top of the silicon (Si) substrate on which the film is deposited, no denuded region in the bulk of this sample is observed. It is proposed that this barrier is effective in reducing both Ge diffusion into the Si substrate and Si diffusion from the substrate into the film. Si diffusing from the Si substrate reduces the Ge oxide into Ge which can subsequently diffuse into the Si substrate. However, the oxide barrier is able to confine the Ge within the oxide matrix so that the denuded region in the bulk of the film cannot form. However the reduction in diffusion should be more significant for Ge as its diffusion coefficient is lower than Si due to its larger size. It is suggested that the denuded region consists of amorphous Ge diffusing towards the Si/SiO2 interface. When the Ge content is increased to slightly more than 70%, TEM showed that Ge nanocrysyals formed after annealing at 800C for only 30 min for samples with and without the oxide barrier. There is no denuded region between the Ge nanocrystals band and the Si/SiO2 interface for both samples but it was observed that coarsening effects were more prominent in the film deposited on top of the oxide barrier. The reduction effect of Si on Ge oxide should not play a significant role in these samples as the Ge content is high..

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Top-Gate Short Channel Amorphous Indium-Gallium-Zinc-Oxide Thin Film Transistors with Sub-1.2 nm Equivalent Oxide Thickness

2022 6th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) (2021)

Kaizhen Han Subhranu Samanta Chen Sun Jishen Zhang Zijie Zheng

We report high performance top-gate amorphous Indium-Gallium-Zinc-Oxide thin film transistors (α-IGZO TFTs) featuring the smallest equivalent oxide thickness (EOT) of sub-1.2 nm among all IGZO-channel TFTs, achieving the highest extrinsic peak transconductance (G _m,ext ) of 62 μS/μm at a drain to source voltage (V _DS )=2V(33.4μS/μm at V _DS =1V) and excellent drain induced barrier lowering (DIBL) of 17.6 m V/V, for a device with a channel length (L _CH ) of 160 nm. The best long channel device has a subthreshold swing (SS) of 67.5 mV/decade. This was enabled by using an ultra-scaled 5 nm high-k HfO ₂ as the gate dielectric. In addition, temperature study was also performed on α-IGZO TFTs. Field effect mobility (μ _eff ) show negligible degradation at high temperature, indicating the great potential of α-IGZO TFTs for various emerging applications.

Transconductance

10.1109/edtm50988.2021.9421049

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In Quest of Temperature-Dependent Ferroelectric Switching in 50 nm Al_0.7Sc_0.3N Thin Film

Subhranu Samanta Chen Liu Lee Hock Koon Minghua Li Binni Varghese

10.1109/uffc-js60046.2024.10793900

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Tungsten nanocrystals embedded in high-k materials for memory application

Applied Physics Letters (2005)

Subhranu Samanta Won Jong Yoo Ganesh Samudra Eng Soon Tok L. K. Bera

The formation of tungsten nanocrystals (W-NCs) on atomic-layer-deposited HfAlO∕Al2O3 tunnel oxide was demonstrated for application in a memory device. It was found that the density and size distribution of W-NCs are not only controlled by the initial film thickness, annealing temperature, and time, but also by the metal∕tunnel oxide interface structure. Well-isolated W-NCs with an average diameter of 5 nm and a surface density of 5×1011cm−2 were obtained by applying a thin Al2O3 wetting layer onto HfAlO tunneling oxide. A large flatband voltage shift of 5.7 V was observed from capacitance–voltage measurement when a bias voltage up to ±4V was applied.

Wetting layer

Biasing

10.1063/1.2045555

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Self-assembled tungsten nanocrystals in high-k dielectric for nonvolatile memory application

Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena (2005)

Subhranu Samanta Zerlinda Tan Won Jong Yoo Ganesh Samudra Sungjoo Lee

Discrete midgap tungsten nanocrystals (W-NCs) embedded in atomic layer deposited hafnium aluminate (HfAlO) film were fabricated by a self-assembly method using sputtering followed by rapid thermal annealing and integrated into transistors for nonvolatile memory application. Transmission electron microscopy and single electron diffraction analysis revealed the formation of crystalline W-NCs (∼5nm) embedded in an amorphous HfAlO matrix. Effects of deposition of thin Al2O3 on the formation of W-NCs were investigated. Al2O3 was found to be effective to retain the amorphous property of the underlying HfAlO, assisting to form uniformly distributed and small W-NCs. Electrical characterization of the Si∕HfAlO∕W-NCs∕HfAlO structure based memory device showed that clear memory effects (1.8 V memory window at operating bias of 7 V) and good retention properties (50mV∕dec threshold voltage decay rate) originate from the charge storage of electrons in W-NDs and deep quantum well of W-NDs embedded in the HfAlO+Al2O3 high-k structure.

High-κ dielectric

Non-Volatile Memory

10.1116/1.2083930

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Novel Dot-Product Engine for Low-Voltage Analog Oxide ReRAM Array

Extended Abstracts of the 2020 International Conference on Solid State Devices and Materials (2019)

Hasita Veluri Y. Li Maheswari Sivan Jessie Xuhua Niu Umesh Chand

10.7567/ssdm.2019.ps-2-11

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