Vertical-cavity surface-emitting lasers (VCSELs) are promising devices for low-cost optical data communications. We fabricated an 8-channel VCSEL array module that is easily push/pull-connected to a mechanically transferable (MT) fiber connector. Modal noise had little adverse effect on bit-error-rate (BER) performance. A BER measurement of 8-channel VCSELs recorded a sensitivity of less than -23.7 dBm at 1 Gb/s and BER=10/sup -11/.
Substrate noise analysis has become increasingly important in recent LSI design. This is because substrate noise, which affects PLLs, causes jitter that results in timing error. Conventional analysis techniques of substrate noise are, however, impractical for large-scale designs that have hundreds of millions of transistors because the computational complexity is too huge. To solve this problem, we have developed a fast substrate noise analysis technique for large-scale designs, one in which a chip is divided into multiple domains by using current density variation and the circuits of each domain are reduced into a macro model. Using this technique, we have designed a microprocessor chip for use in the supercomputer SX-9 (die size: 20 mm times 21 mm, frequency: 3.2 GHz, transistor count: 350 M). Computation time with this design is five times shorter than [2] that with a 1/3000 scale design using a conventional technique, while resulting discrepancy with measured period jitter is less than 15%.
Frequency-stabilized and spectral-linewidth-narrowed laser diode systems are being developed for optical pumping of a cesium atomic clock. Frequency stabilization and reduction of spectral linewidth were carried out by utilizing optical feedback from a Fabry-Perot interferometer. Saturation absorption and fluorescence spectroscopy results are presented. It is shown that the long-term stability of optical locking is not sufficient for a practical atomic clock.< >
Substrate noise analysis has become increasingly important in recent LSI design. This is because substrate noise, which affects PLLs, causes jitter that results in timing error. Conventional analysis techniques of substrate noise are, however, impractical for large-scale designs that have hundreds of millions of transistors because the computational complexity is too huge. To solve this problem, we have developed a fast substrate noise analysis technique for large-scale designs, in which a chip is divided into multiple domains and the circuits of each domain are reduced into a macro model. Using this technique, we have designed a processor chip for use in the supercomputer (die size: 20mm × 21mm, frequency: 3.2GHz, transistor count: 350M). Computation time with this design is five times faster than that with a 1/3000 scale design using a conventional technique, while resulting discrepancy with measured period jitter is less than 15%.
We propose and demonstrate control of light-output polarization for surface-emitting laser-type devices by using strained quantum-well active layers grown on a misoriented substrate. This structure has slightly asymmetric strain tensor elements on the surface plane. Due to orbital-strain interaction, the valence band structures change and the optical transition matrix element depends on the polarization of the light. Here, theoretical analysis and experimental results on the direction of misorientation are described, and it is shown that how the polarization of the light-output is related to asymmetry in strain tensors. For the devices, which have In/sub 0.2/Ga/sub 0.8/As active layers grown on a 2-degree-off-(100) GaAs substrate toward (111)B, the light-output is polarized in [01~1] with the reproducibility of as high as 88%. This highly controlled polarization is probably due to the combination of converse piezoelectric effect and asymmetry in the lattice mismatch on the surface caused by misorientation.< >
Temperature-insensitive vertical-cavity surface-emitting lasers (VCSELs) are promising devices for low-cost optical interconnection. The authors measured the injection current at a threshold and light output power of 1 mW at temperatures of 20, 50 and 80°C. At 80°C and 1 mW, the driving current for VCSELs with a broad gain bandwidth was reduced by ~20%, compared with that for conventional VCSELs. The deviation in driving current for VCSELs with a broad gain bandwidth was ~10%, which demonstrates that these VCSELs have uniform temperature characteristics in an 8×8 array.
