Wen‐Yo Lee

Lunghwa University of Science and Technology

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Chiou‐Yng Lee

Lunghwa University of Science and Technology

Ching‐Long Shih

National Taiwan University of Science and Technology

Ta-Chih Hung

University of Michigan–Ann Arbor

Jhu-Syuan Guo

Lunghwa University of Science and Technology

Ti-Hung Chen

Lunghwa University of Science and Technology

Chieh‐Tsai Wu

Chang Gung Memorial Hospital

Jeng‐Shyang Pan

Chaoyang University of Technology

Jim-Min Lin

Feng Chia University

Che Wun Chiou

Chien Hsin University of Science and Technology

Bo-Jhih Chen

National Taiwan University of Science and Technology

Cooperative Institutions

Lunghwa University of Science and Technology

National Taiwan University of Science and Technology

Industrial Technology Research Institute

Chang Gung University

National Yang Ming Chiao Tung University

ITRI International

Linkou Chang Gung Memorial Hospital

Chang Gung Memorial Hospital

Chien Hsin University of Science and Technology

National Taipei University of Technology

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Particle swarm optimization based networked control system design with uncertainty

MATEC Web of Conferences (2017)

Ti-Hung Chen Ming‐Feng Yeh Wen‐Yo Lee

This study discusses the design of state feedback control for networked control system (NCS) with uncertainty, where the feedback controller is used to solve the latency and the packet dropout caused by NCS. The conventional design approach generally adopts Lyapunov stability theorem to analyse the stability of NCSs and then Lyapunov-Krasovskii stability criterion is solved to obtain the control gain matrix. Rather than using complex Lyapunov-Krasovskii stability criterion and solving difficult linear matrix inequality (LMI) problem in the control design, this study attempts to utilize particle swarm optimization (PSO) algorithm to search an optimal feedback control gain for the NCS. Finally, the computer simulation is illustrated the proposed control strategy and demonstrated the control performance.

Linear matrix inequality

Networked control system

Lyapunov stability

Dropout (neural networks)

10.1051/matecconf/201711901051

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Citations (3)

Low-Latency Digit-Serial Systolic Double Basis Multiplier over <formula formulatype="inline"> <tex Notation="TeX">$\mbi GF{(2^m})$</tex> </formula> Using Subquadratic Toeplitz Matrix-Vector Product Approach

IEEE Transactions on Computers (2012)

Jeng‐Shyang Pan Reza Azarderakhsh Mehran Mozaffari Kermani Chiou‐Yng Lee Wen‐Yo Lee

Recently in cryptography and security, the multipliers with subquadratic space complexity for trinomials and some specific pentanomials have been proposed. For such kind of multipliers, alternatively, we use double basis multiplication which combines the polynomial basis and the modified polynomial basis to develop a new efficient digit-serial systolic multiplier. The proposed multiplier depends on trinomials and almost equally space pentanomials (AESPs), and utilizes the subquadratic Toeplitz matrix-vector product scheme to derive a low-latency digit-serial systolic architecture. If the selected digit-size is $d$ bits, the proposed digit-serial multiplier for both polynomials, i.e., trinomials and AESPs, requires the latency of $2\left\lceil \!{\sqrt {{m \over d}}} \right\rceil\! $ , while traditional ones take at least $O\left({\left\lceil {{m \over d}} \right\rceil} \right)$ clock cycles. Analytical and application-specific integrated circuit (ASIC) synthesis results indicate that both the area and the time $ \times $ area complexities of our proposed architecture are significantly lower than the existing digit-serial systolic multipliers.

Trinomial

Application-specific integrated circuit

Polynomial basis

10.1109/tc.2012.239

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Citations (36)

Hybrid Digit-Serial Multiplier for Shifted Polynomial Basis of GF(2 m )

Advances in intelligent systems and computing (2013)

Chiou‐Yng Lee Wen‐Yo Lee Che Wun Chiou Jeng‐Shyang Pan Cheng-Huai Ni

GF(2)

Numerical digit

Polynomial basis

10.1007/978-3-319-01796-9_39

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Citations (1)

Scalable Systolic Multiplier over Binary Extension Fields Based on Two-Level Karatsuba Decomposition

World Academy of Science, Engineering and Technology, International Journal of Computer, Electrical, Automation, Control and Information Engineering (2014)

Chiou‐Yng Lee Wen‐Yo Lee Chieh‐Tsai Wu Cheng-Chen Yang

Shifted polynomial basis (SPB) is a variation of polynomial basis representation. SPB has potential for efficient bit level and digi -level implementations of multiplication over binary extension fields with subquadratic space complexity. For efficient implementation of pairing computation with large finite fields, this paper presents a new SPB multiplication algorithm based on Karatsuba schemes, and used that to derive a novel scalable multiplier architecture. Analytical results show that the proposed multiplier provides a trade-off between space and time complexities. Our proposed multiplier is modular, regular, and suitable for very large scale integration (VLSI) implementations. It involves less area complexity compared to the multipliers based on traditional decomposition methods. It is therefore, more suitable for efficient hardware implementation of pairing based cryptography and elliptic curve cryptography (ECC) in constraint driven applications. Keywords—Digit-serial systolic multiplier, elliptic curve cryptography (ECC), Karatsuba algorithm (KA), shifted polynomial basis (SPB), pairing computation.

Polynomial basis

Source

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Force control and breakthrough detection of a bone drilling system

Wen‐Yo Lee Ching‐Long Shih

Because neurosurgery and orthopedic surgery often require the drilling of bones, this paper attempts to solve the problem of bone drilling. The goal is to realize a control system, which is able to drill with a contact drilling force and can automatically stop drilling at the moment of breaking through. In particular, both the DC drilling motor control and the feed rate control are driven by force control in order to accommodate the system impedance. Moreover, the breakthrough detection is according to the threshold information of the thrust force as well as the trend of both the drilling torque and feed rate. The proposed technique has been experimentally verified through the drilling of pig bones, and the results are in accordance with the theoretical model both in the bone drilling process and at the point of breakthrough.

10.1109/robot.2003.1241853

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Citations (12)

Subquadratic space complexity digit-serial multiplier over binary extension fields using Toom-Cook algorithm

Chiou‐Yng Lee Pramod Kumar Meher Wen‐Yo Lee

In this paper, we present a new (4,2)-way Toom-Cook algorithm using finite field interpolation. The proposed algorithm uses multi-evaluation scheme to construct a digit-serial multiplier over GF(2 ^m ) which involves subquadratic space-complexity. From theoretical analysis, it is found that the proposed architecture has O(m ^{log4 5} ) space complexity and O(m ^{log4 2} ) latency, which is significantly less than traditional digit-serial multipliers.

10.1109/isicir.2014.7029517

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Citations (8)

Indoor Service Robot with Multi-sensors Implementation on the MOM

Wen‐Yo Lee Yun-Ter Su Ta-Chih Hung

This paper proposes an indoor service robot, which integrated with multi-sensors to implement the service robotics functions. This experiment setup is based on the common platform called Automatic Robot Toolkit (ART), which offers a message stream dispatch mechanism and system development toolkit for robots. The common platform could be used to integrate different types of the components of a mobile robot, which includes a driving module, sensor module, a power module, human machine interface module, and other many. The Stargazer, stereo vision sensor, and laser senor are integrated into the ART system for solving the large positing error issues. On the other hand, the sonar sensors, IR sensors are originally mounted on the system control module for roughly detecting the obstacles of the environment. By the sensor fusion method, we may position the robot in an indoor place, for example a hospital.

Service robot

Mobile Robot Navigation

Interface (matter)

Sensor Fusion

10.1109/cason.2010.34

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Fault-Tolerant Bit-Parallel Multiplier for Polynomial Basis of GF(2m)

Chiou‐Yng Lee Wen‐Yo Lee Pramod Kumar Meher

In this paper, we present novel fault-tolerant architecture for bit-parallel polynomial basis multiplier over GF(2m) which can correct the erroneous outputs using linear code. We have designed a parity prediction circuit based on the code generator polynomial that leads lower space overhead. For bit-parallel architectures, the space overhead is about 11%. Moreover, there is only marginal time overhead due to incorporation of error-correction capability that amounts to 3.5% in case of the bit-parallel multiplier. Unlike the existing concurrent error correction (CEC) multipliers or triple modular redundancy (TMR) techniques for single error correction, the proposed architectures have multiple error-correcting capabilities.

Triple modular redundancy

Parity bit

Polynomial basis

10.1109/cas-ictd.2009.4960824

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Citations (4)

Scalable Master-Slave Isomorphic Module for IoT Service System

Wen‐Yo Lee Ching‐Long Shih Ti-Hung Chen Yung‐Hui Chen

This paper shows a master-slave module, which is based on a PCB board. The isomorphic circuit board can be the master or the slave through setup the configuration bits. The design can be introduced to several industrial fields, for example, the remote-based control system and the procedure control system, etc. According to the previous work of the researches, the IoT have been introduced to design the industrial equipment; nevertheless, there still have a lot of applications do not have been served. The IoT offers the information all about a system, so the equipment can be taken care anywhere anytime. In this paper, a dental system for the teeth root examining system is developed by the isomorphic master-slave module. It reduces not only the hardware complexity, but also the system development cost.

Master/slave

10.1109/ubi-media.2019.00051

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Citations (2)

FPGA Implementation of Vision-Based Fingertip-Writing Digits Recognition System

Ching‐Long Shih Bing-Lin Yang Wen‐Yo Lee Ti-Hung Chen Bo-Jhih Chen

This paper presents a vision-based fingertip writing digits detection and recognition system using a CMOS camera and FPGA implementation. It is a real-time signature detector, since the image process algorithms are all executed in Verilog code. The experimental results show that the system can successfully recognize fingertip-numeral-writing with a accuracy rate of 95.8%.

Verilog

Numeral system

Code (set theory)

Signature (topology)

10.1109/smc.2015.98

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Citations (1)