We study Positive-Bias Temperature Instability (PBTI) of enhancement-mode Schottky Type p-GaN gate HEMTs with different gate stack geometry. In particular, we experimentally investigate the impact of the gate offset, the portion of the p-GaN layer in the gate stack that is not contacted by the gate metal. Our study reveals trapping-induced negative threshold voltage shifts after benign gate stress that are recoverable, consistent with the literature. At very high gate stress voltages, there is a permanent negative threshold shift consistent with a leakier gate-metal/p-GaN junction. However, for long gate offset length devices, a new PBTI mechanism with a permanent positive threshold shift arises at high gate stress voltages that is uniquely associated with the uncontacted offset region of the p-GaN layer. This implies that there is a trade-off between increasing the gate offset length to limit sidewall leakage and ensuring stable device performance. Our study further reveals the role that gate current continuity across both barriers in the gate stack of a p-GaN HEMT plays in setting up the gate electrostatics.
In this Letter, we experimentally investigate the impact of gate geometry on forward operation of Schottky-gate p-GaN high electron mobility transistors (HEMTs). In particular, we analyze devices with changing gate-metal/p-GaN junction area and p-GaN/AlGaN/GaN heterostructure area in the linear regime. These devices exhibit unique threshold voltage and subthreshold swing scaling dependence with gate geometry that is in contrast with classic field-effect transistors. On the other hand, peak transconductance and ON resistance are found to scale classically. We find that these results arise from the fact that with a Schottky contact to the p-GaN layer, under steady-state conditions, the p-GaN layer voltage is set by current continuity across the gate stack. Furthermore, a detailed scaling study of the gate current reveals that current flow across the p-GaN/AlGaN/GaN heterostructure is not uniform—instead, it preferentially flows through the ungated portion of the p-GaN layer. Our study concludes that in Schottky-type p-GaN gate HEMTs, the respective areas of two junctions constitute an additional design degree of freedom to fine-tune device performance.
We develop new fundamental methodologies for high performance and provably safe autonomous and collaborative control and operation of autonomous unmanned aerial systems (UAS) in the national airspace (NAS), where both UAS and manned aircraft fly. The proposed framework is model-based, and emphasizes multiple scales in time and space as well as hybrid systems mathematics to capture both the analog and logical components of control functionalities. We develop on-line control laws that allow for multiple UAS agents to reconfigure to different formations with proofs of safety and convergence while navigating in integrated airspace with piloted air vehicles. We demonstrate our results in simulated scenaria with both cooperative and uncooperative air vehicles.
The current flow through interconnects can be locally crowded and its impact on electromigration (EM) has not been studied well. We design test structures with different levels of current crowding and test its impact on EM Lifetime. We also simulate the current crowding of each case and correlate them with the observed EM lifetimes. Even if there is localized hot spot having very high current density but the region is small, the impact on EM lifetime is small. For example, EM lifetime decreases less than 4% for 24% local current density increase. The extent of impact is a function of length of the crowding as well as the local current density. Including both the current density and the length effects on EM, we propose a quantifiable local current crowding factor (LCCF). The EM lifetime depends on the power of the LCCF with variable power exponents. The power exponent increases with LCCF and reaches a maximum value before starting to decrease to zero. At very large LCCF, when currents are crowded over long length, the impact is not localized anymore and the additional lifetime reduction by additional current crowded space is zero. So the power exponent is zero for the case. Utilizing the LCCF provides a practical method for how to address the inevitable local current crowding and enhance the EM check accuracy especially for the analog semiconductor circuits.
We have developed a versatile methodology to systematically investigate the RF reliability of GaN High-Electron Mobility Transistors. Our technique utilizes RF and DC figures of merit to diagnose the degradation of RF stressed devices in real time. We have found that there is good correlation between selected RF and DC figures of merit. However, compared with DC stress, RF stress at the same bias point is found to be more severe and to introduce new degradation modes. At high power level, RF stress induces a prominent trapping-related increase in the source resistance most likely as a result of the creation of new traps. This is in contrast with drain degradation that often occurs under similar DC conditions. Our findings cast a doubt over the ability of DC life test in evaluating reliability under RF power conditions.
