In high-throughput real-time media processing systems, the communication between processing units is typically specified as multi-dimensional arrays. However, the implementation of such applications is mostly FIFO (first-in, first-out) based. Mapping array communication onto a FIFO-based implementation requires complex address generators if the arrays have multiple dimensions. In this paper, we present a method for mapping array communication onto an efficient microcomputer architecture implementation based on FIFO communication via shared memory. A good hardware/software partitioning for the address generation is proposed. Furthermore, a complete design flow from specification to implementation is described. We illustrate this method with a design case: the communication of video frames between the front-end and the compressor in an MPEG encoder.
Fluorescent In Situ Hybridisation (FISH) was used to monitor the presence of filamentous microorganisms in industrial wastewater treatment plants (WWTPs). Monitoring with a restricted set of FISH probes in WWTPs from potato industry showed growth and decline of Thiothrix populations that could be linked to operational procedures. In a follow up project new FISH probes were developed for filamentous bacteria in industrial WWTPs and 70 WWTPs were analysed for presence of these filaments. Several newly described species of filamentous bacteria appear to be common and dominant in industrial WWTPs. Monitoring of a WWTP from textile industry showed growth and decline of one of these organisms when operational conditions in the plant were varied. The present paper demonstrates that bulking sludge in industrial wastewater treatment plants can effectively be monitored using a combination of standard chemical analyses and the FISH technique.
Summary form only given. In this paper we extend the method to deal with coarse-grain operations in static scheduled VLIW processors as is introduced by Busa (2000). We allow functional units with a controller that does not traverse its states in a predefined way. This makes it possible to execute a function that contains a conditional construct like an if-statement as a single operation on a functional unit. In this way the performance penalty otherwise caused by branch instructions is reduced. By adding valid input and output signals, the problem is circumvented that during compilation it is, for this type of functional unit, not known when and how many samples will be consumed or produced. We refer to these units as Conditional Input/output Units (CIUs). The operations that are executed on CIUs are called Conditional Input/output Operations (CIOs). The difference with guarded operations is that the production of a result of a CIO depends on the state of the CIU.
Turbo decoding offers outstanding error correcting capabilities, that will be used in wireless applications like the Universal Mobile Telecom Standard (UMTS). However the algorithm is very computational intensive, and therefore an implementation on a general purpose programmable DSP results in a power consumption which reduces the applicability of turbo decoding in hand-held applications. In this paper we present a solution based on a layered processing architecture. This architecture includes an application specific Very Long Instruction Word (VLIW) processor, a data flow processor, and hard-wired execution units in a hierarchical way. The power consumption of this solution is an order of magnitude better than the implementation on a current state of the art, power efficient general purpose DSP.
